University of California, Santa Barbara
Department of Electrical and Computer Engineering
Semiconductor Device Processing
ECE 220A / MAT 215A - Fall 2004
Instructor: Dr. Ilan Ben-Yaacov
Schedule:Tues/Thurs 12:00 - 1:50 p.m., PHELP 1437
(Download printable pdf version of syllabus)
Topics to be covered
• Junction Formation
• Ion implantation
• Optical Lithography
• Wet Etching
• Reactive Ion Etching
• Thin Film Deposition
• Chemical Vapor Deposition
• Ohmic, Schottky, and MOS Contact Formation
• NMOS Process and Characterization
Prerequisite: Basic understanding of semiconductor materials or consent of the instructor
Instructor: Ilan Ben-Yaacov, Room 2213, ESB, ext. 5295, firstname.lastname@example.org
Time: Tuesday and Thursday 12:00-1:50 p.m.
Place: PHELPS 1437
Text: Silicon Processing for the VLSI Era: Volume 1 - Process Technology by S. Wolf and R. N. Tauber, published by Lattice Press, 2000.
Handouts and class notes will complement the text. All handouts can be downloaded by clicking on the appropriate link at the bottom of this website.
Course format: There will be homework assignments, a midterm, laboratory work, and a final lab project. Laboratory work will consist of experimenting with various processes such as lithography, thermal oxidation, and wet etching, and determining process tolerances. For the final project, you will use the skills you have developed in the lab to fabricate and characterize a MOS transistor. Homework, midterm, lab, and final lab project will each contribute 25%, 25%, 10% and 40% to the final grade.
Office Hours: Office hours are Tuesdays and Thursdays 2:30-3:30 p.m. or by appointment.
Laboratory Hours: There are no scheduled hours for the lab work. The teaching cleanroom will be available at most times with key card access, if two or more students are working together. For safety reasons, you will not be permitted to work alone. There will be equipment demonstration sessions, which are required.
Lab Safety: It is essential that safety procedures be followed at all times. You will be working with acids (including HF), bases, and organic solvents that can be hazardous if not handled properly. You are required to attend a safety orientation session before you will be permitted to enter the lab. There are sessions provided by the university, or a series of tapes provided by the ECE department and Martin Vandenbroeck.
Teaching Assistants: The TA's are Danny Feezell (email@example.com, lab hours Mon/Wed 9-10:30am) and Chris Sarantos (firstname.lastname@example.org, lab hours Wednesday 1-2:30pm)
Lab Supervisor: Martin Vandenbroeck, Room 4110, Engineering I, ext. 4142, email@example.com
Lab Project 1 - Due Thurs, 10/7/04 by 5:00pm
Lab Project 2 - Due Thurs, 10/21/04 by 5:00pm
Final Lab Project - Due Tues, 12/7/04 by 5:00pm
Homework 1 - Due 10/5 HW 1 Solutions
Homework 2 - Due 10/12 HW 2 Solutions
Homework 3 - Due 10/26 HW 3 Solutions
Homework 4 - Due 11/9 HW 4 Solutions
Homework 5 - Due 11/18 HW 5 Solutions
The midterm will be held on Tuesday, November 23rd. You will be allowed 1 page (8.5 x 11 inch) of notes, you may write on the front and back, and a calculator.
NMOS Process Phosphorous Predeposition
Wafer Scribing and Cleaning Metal Lift-Off Process
Oxidation Procedure Metal Evaporation
Lithography Process Sintering Procedure
HF Safety Tips Strip Annealing
Furnace Cleaning Periodic Table of Elements
Electrical and Computer Engineering || College of Engineering || Ilan Ben-Yaacov's Home Page
This page was last updated on 12/17/04.