ECE152A's Homepage

Instructor: Yogananda Isukapalli

Catalog Description

Design of synchronous digital systems: timing diagrams, propagation delay, latches and flipflops, shift registers and counters, Mealy/Moore finite state machines, Verilog, 2-phase clocking, timing analysis, CMOS implementation, S-RAM, RAM-based designs, ASM charts, state minimization.

Lecture Topics

Four labs: Implemented on an FPGA board, require verilog knowledge.

 

Text Book: Fundamentals of Logic Design, Roth and Kinney, Cengage Learning.

 

  • All course material is available on GauchoSpace