Yuan Xie's Memory Research Page

In recent years, emerging non-volatile memory (NVM) technologies, e.g., Phase-Change RAM (PCRAM), STT-RAM (MRAM) Resistive RAM (RRAM), and Memristors, have gained substantial attentions and are being actively pursued by industry. With combined attractive features such as scalability, fast read/write, negligibel leakage, and non-volatility, these emerging memory technologies demonstrated a great potential to be the candidates of the future universal memories.

As such emerging memory technologies are getting mature, it is important for circuit/architecture designers to understand their pros and cons for better utilizing them to improve the performance/power/reliability of future computing systems. This project seeks to answer the questions as follows: How to model such emerging memory technologies at circuit/architecture levels? What will be the impacts of such memory technologies on the future computer system designs? What are the research challenges to overcome for the widely-adoption of these technologies? What will be the novel applications/architectures that can leverage such emerging memory technologies?

This tutorial paper gives an overview of the motivation of this project. Yuan Xie. "Modeling, Architecture, and Applications for Emerging Non-volatile Memory Technologies." IEEE Computer Design and Test, Vol.28, No.1, pp.44-51, January 2011


The MAAEMO project is supported in part by NSF 1218867, 1213052, and Department of Energy under Award Number DE-SC0005026.

Tool Release:

  • PCRAMsim: It is a tool for estimating the optimum access times, and power dissipation of a PCRAM-based memory. (Beta version with technical details are published in ICCAD 2009)
  • NVsim : NVsim is a suite of toolsets for modeling cache/memory/storage that are based on the emerging non-volatile memory technologies.
  • NVmain : NVmain is a memory simulator for both DRAM-based main memory and emerging NVM-based main memory, as well as 3D stacked and wide-IO DRAM main memory.

Selected Publications:

  • [TACO2014] Jue Wang,Xiangyu Dong, Yuan Xie. "Preventing STT-RAM Last-Level Caches from Port Obstruction", To appear in ACM Transactions on Architecture and Code Optimization (TACO), 2014

  • [TACO2014] Zhe Wang, Shuchang Shan, Ting Cao, Junli Gu, Yi Xu, Yuan Xie, Daniel Jimenez. "WADE: Writeback-Aware Dynamic Cache Management for NVM-based Main Memory System." To appear in ACM Transactions on Architecture and Code Optimization (TACO), 2014

  • [TACO2014] Jue Wang, Xiangyu Dong, Yuan Xie, Norm Jouppi. Endurance-Aware Cache Line Management for Non-Volatile Caches. ACM Transactions on Architecture and Code Optimization (TACO), Vol.11, No.1, 2014

  • [ISVLSI2012] Matt Poremba and Yuan Xie, "NVMain: An Architectural-Level Main Memory Simulator for Emerging Non-volatile Memories", Proceedings of IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 2012, pp.392-397. To download the software, please visit www.NVmain.org.

  • [TCAD2012] Xiangyu Dong, Cong Xu, Yuan Xie, Norm Jouppi. "NVSim: A Circuit-Level Performance, Energy, and Area Model for Emerging Non-Volatile Memory", IEEE Transactions on Computer Aids Design (TCAD), 2012. You may download the NVSim toolset from here

  • [TACO11] Xiangyu Dong, Yuan Xie, Naveen Muralimanohar, Norm Jouppi. "Hybrid Checkpointing using Emerging Non-Volatile Memories for Future Exascale Systems." ACM Transactions on Architecture and Code Optimization (TACO), Vol.8, No. 2, Article 5, 29 pages, July 2011

  • [IETCDT2011] Xiangyu Dong, Xiaoxia Wu, Yuan Xie, Yiran Chen, Hai Li. "Stacking MRAM atop Microprocessors: An Architecture- Level Evaluation." IET Computers and Digital Techniques (IET CDT), Vo.5, No.3, pp.213-220, June 2011

  • [ICCAD2011] Cong Xu, Dimin Niu, Xiaochun Zhu, Seung H. Kang, Matt Nowak and Yuan Xie, "Device-Architecture Co-Optimization of STT-RAM Based Memory for Low Power Embedded System", Proceedings of ACM/IEEE Intl. Conf. on Computer-aided Design (ICCAD), 2011, pp.463-470.

  • [ISLPED10] Yibo Chen, Jishen Zhao, Yuan Xie, "3D-NonFAR: Three-dimensional Non-Volatile FPGA Architecture Using Phase Change Memory", Intl Symp. on Low Power Electronics Devices (ISLPED), 2010.

  • [TACO] Xiaoxia Wu, Jian Li, Lixi Zhang, E. Speight, R. Rajamony, Yuan Xie. "Hybrid Cache Architecture with Disparate Memory Technologies." To appear in ACM Transactions on Architecture and Code Optimization (TACO).

  • [DAC 10] Dimin Niu, Yiran Chen, Cong Xu, Yuan Xie, "Impact of Process Variations on Emerging Memristor." To appear in Proceedings of Design Automation Conference (DAC). 2010.

  • [DATE 10] Yongsoo Joo, Dimin Niu, Guangyu Sun, Xiangyu Dong, Yuan Xie, "Energy- and Endurance-Aware Design of Phase Change Memory Caches." Proceedings of Design Automation and Test in Europe (DATE). 2010.

  • [HPCA 10] Guangyu Sun, Yongsoo Joo, Yibo Chen, Yuan Xie, Yiran Chen, Helen Li, "A Hybrid Solid-State Storage Architecture for Performance, Energy Consumption and Lifetime Improvement." Proceedings of High Performance Computer Architecture (HPCA). 2010.

  • [ASP-DAC 10] Dimin Niu, Yibo Chen, Xiangyu Dong, Yuan Xie, "Energy and Performance Driven Circuit Design for Emerging Phase-Change Memory." Proceedings of Asia and South-Pacifc Design Automation Conference (ASP-DAC). 2010.

  • [SC 09] Xiangyu Dong, Naveen Muralimanohar, Norm Jouppi, Richard Kaufmann, Yuan Xie, "Leveraging 3D PCRAM Tech nologies to Reduce Checkpoint Overhead for Future Exascale Systems." Proceedings of International Conference on High Performance Computing, Networking, Storage and Analysis (SC). 2009.

  • [ICCAD 09] Xiangyu Dong, Norm Jouppi, Yuan Xie "PCRAMsim: System-Level Performance, Energy, and Area Modeling for Phase-Change RAM" Proceedings of International Conference on Computer-Aided Design (ICCAD). 2009. pp 269-275.

  • [ISCA 09] Xiaoxia Wu, Jian Li, Lixi Zhang, Evan Speight, Ram Rajamony, Yuan Xie, "Hybrid Cache Architecture.", In Proceedings of International Symposium on Computer Architecture (ISCA), June, 2009.

  • [HPCA 09] Guangyu Sun, Xiangyu Dong, Yuan Xie, Jian Li, Yiran Chen, "A Novel 3D Stacked MRAM Cache Architecture for CMPs", International Symposium on High Performance Computer Architecture, 2009 (35 out of 185 submissions, 19%).

  • [DAC 08] Xiangyu Dong, Xiaoxia Wu, Guangyu Sun, Helen Li, Yiran Chen, Yuan Xie. "Circuit and Mircoarchitecture Evaluation of 3D Stacking Magnetic RAM (MRAM) as a Universal Memory Replacement" [PDF] , Proceedings of Design Automation Conference (DAC) 2008.


 *MAAEMO in Finnish means "The Mother Earth". The physical properties of the Earth allows life to evolve and persist. We envision the unique properties of emerging STT-RAM/PCRAM/RRAM (non-volatile memory sometimes is also called persistent memory) can also evolve novel circuits, architectures and applications.