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| − | ==Process Issues and Defects==
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| − | {| border="3"
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| − | |+ '''Hybrid Silicon Process Modules'''
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| − | |- style="background:red; color:white"
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| − | ! Process Step!! Issue or Defect !! Link
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| − | |-
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| − | | [[Initial wafer check]] || || ||
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| − | |-
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| − | | [[Dice and cleave]] || || ||
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| − | |-
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| − | | [[SOI waveguide definition]] || || ||
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| − | |-
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| − | | [[SOI grating definition]] || || ||
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| − | |-
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| − | | [[SOI actives definition]] || || ||
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| − | |-
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| − | | [[Vertical channel definition]] || || ||
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| − | |-
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| − | | [[Protection layer definition]] || || ||
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| − | |-
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| − | | [[Quantum well intermixing]] || || ||
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| − | |-
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| − | | [[Wafer bonding]] || || ||
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| − | |-
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| − | | [[Gap fill]] || || ||
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| − | |-
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| − | | [[P-mesa definition]] || || ||
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| − | |-
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| − | | [[Lower SCH definition]] || || ||
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| − | |-
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| − | | [[N-InP definition]] || || ||
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| − | |-
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| − | | [[N-metal definition]] || || ||
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| − | |-
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| − | | [[P-metal definition]] || || ||
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| − | |-
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| − | | [[Ion implantation]] || || ||
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| − | |-
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| − | | [[Via definition]] || || ||
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| − | |-
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| − | | [[Probe metal]] || || ||
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| − | |-
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| − | | [[Remove III/V in gap]] || || ||
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| − | |-
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| − | | [[Dice and polish]] || || ||
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| − | |-
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| − | | [[Initial standard wafer testing]] || || ||
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| − | |-
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