Difference between revisions of "Wafer Table (old)"
From OptoelectronicsWiki
Line 2: | Line 2: | ||
|+ '''SOI wafer table''' | |+ '''SOI wafer table''' | ||
|- style="background:red; color:white" | |- style="background:red; color:white" | ||
− | ! Wafer ID !! | + | ! Wafer ID !! Substrate(um) !! BOX(um) !! Device layer (um) !! Details of device layer !! # bought !! # remaining !! Supplier !! Note |
|- | |- | ||
− | | 1I29437.1 || | + | | 1I29437.1 || 675 || 1 || 0.7 || 0.2um 1E14 B, 0.5um 1E10|| 21 || 18 || SOITEC+LSRL || |
|- | |- | ||
− | | 1I29437.1 || | + | | 1I29437.1 || 675 || 1 || 0.4 || 0.2um 1E14 B, 0.2um 1E10|| 4 || 0 || SOITEC+LSRL || |
|- | |- | ||
− | | | + | |} |
+ | {| border="3" | ||
+ | |+ '''SOI patterned wafer table''' | ||
+ | |- style="background:blue; color:white" | ||
+ | ! Wafer ID !! Substrate(um) !! BOX(um) !! Device layer (um) !! Details of device layer !! Rib Etch (um) !!# bought !! # remaining !! Supplier !! Note | ||
|- | |- | ||
− | | | + | | H4JYY8G || || 1 || 0.7 || Undoped Si || 0.3 || 1 || 1/4 || umonyx/Intel || LASOR/PhASER |
+ | | | ||
+ | | H4JYY8G || || 1 || 0.7 || Undoped Si || 0.4 || 1 || 1 || umonyx/Intel || LASOR/PhASER | ||
|- | |- | ||
− | | | + | | H4JYY8G || || 1 || 0.7 || Undoped Si || 0.3 || 1 || 1 || umonyx/Intel || LASOR/PhASER, oxidation smooth |
|- | |- | ||
− | | || || || || || || | + | | || || || || || || || || || |
|- | |- | ||
|} | |} | ||
Line 23: | Line 29: | ||
|+ '''III/V wafer table''' | |+ '''III/V wafer table''' | ||
|- style="background:red; color:white" | |- style="background:red; color:white" | ||
− | ! Wafer ID !! Layerstack !! Data and spec-sheet !! | + | ! Wafer ID !! Layerstack !! Data and spec-sheet !! # bought !! # remaining !! Supplier !! Design/simulation results |
|- | |- | ||
| GLDA0908271-C || || || 5 || 3 || LandMark || | | GLDA0908271-C || || || 5 || 3 || LandMark || |
Revision as of 16:41, 31 March 2010
Wafer ID | Substrate(um) | BOX(um) | Device layer (um) | Details of device layer | # bought | # remaining | Supplier | Note |
---|---|---|---|---|---|---|---|---|
1I29437.1 | 675 | 1 | 0.7 | 0.2um 1E14 B, 0.5um 1E10 | 21 | 18 | SOITEC+LSRL | |
1I29437.1 | 675 | 1 | 0.4 | 0.2um 1E14 B, 0.2um 1E10 | 4 | 0 | SOITEC+LSRL |
Wafer ID | Substrate(um) | BOX(um) | Device layer (um) | Details of device layer | Rib Etch (um) | # bought | # remaining | Supplier | Note | |||||||||||
---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
H4JYY8G | 1 | 0.7 | Undoped Si | 0.3 | 1 | 1/4 | umonyx/Intel | LASOR/PhASER | H4JYY8G | 1 | 0.7 | Undoped Si | 0.4 | 1 | 1 | umonyx/Intel | LASOR/PhASER | |||
H4JYY8G | 1 | 0.7 | Undoped Si | 0.3 | 1 | 1 | umonyx/Intel | LASOR/PhASER, oxidation smooth | ||||||||||||
Wafer ID | Layerstack | Data and spec-sheet | # bought | # remaining | Supplier | Design/simulation results |
---|---|---|---|---|---|---|
GLDA0908271-C | 5 | 3 | LandMark | |||