Difference between revisions of "UCSB E-Phi Runs"
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====Components and structures==== | ====Components and structures==== | ||
* Bonding test structures | * Bonding test structures | ||
− | ** Patterns for bonding | + | ** Patterns for bonding [Di, Martijn] |
* SOI waveguide test structures | * SOI waveguide test structures | ||
− | ** Resolution markers | + | ** Resolution markers, Taper tip test structure [Sudha] |
− | ** Loss test structures | + | ** Loss test structures [Martijn] |
* SOI component test structures | * SOI component test structures | ||
− | ** MMIs | + | ** MMIs [Martijn, Yongbo] |
− | ** Bends | + | ** Bends [Martijn] |
− | ** 10-GHz and 20-GHz ring filters/oscillators | + | ** Offsets [Martijn] |
+ | ** 10-GHz and 20-GHz ring filters/oscillators [Martijn] | ||
* Other ideas | * Other ideas | ||
− | + | ** WG crossing [Sid] | |
− | + | ** Silicon nanowire tapers [Jock] | |
− | + | ** Taper from 0.8um to 2.0um, change taper length/shape [Sid, Geza] | |
− | + | ||
===UCSB-E-Phi-test-2=== | ===UCSB-E-Phi-test-2=== |
Revision as of 12:53, 16 December 2011
Contents
Planned runs for UCSB - E-Phi
Component test runs
UCSB-E-Phi-test-1
SOI only: test litho and bonding uniformity
Planning: ideas due 12/14, mask review around 12/20
Components and structures
- Bonding test structures
- Patterns for bonding [Di, Martijn]
- SOI waveguide test structures
- Resolution markers, Taper tip test structure [Sudha]
- Loss test structures [Martijn]
- SOI component test structures
- MMIs [Martijn, Yongbo]
- Bends [Martijn]
- Offsets [Martijn]
- 10-GHz and 20-GHz ring filters/oscillators [Martijn]
- Other ideas
- WG crossing [Sid]
- Silicon nanowire tapers [Jock]
- Taper from 0.8um to 2.0um, change taper length/shape [Sid, Geza]
UCSB-E-Phi-test-2
III/V lasers and SOAs on SOI;
UCSB-E-Phi-test-3
SOI passives coupled to ULLWs;
UCSB-E-Phi-test-4
EDWA test run;
UCSB-E-Phi-test-5
Isolator test run;
Shuttle runs
UCSB-E-Phi-1
III/V gain on SOI;
UCSB-E-Phi-2
III/V gain and ULLWs on SOI;
UCSB-E-Phi-3
to be decided: either isolators or EDWAs on a III/V on SOI platform.