Difference between revisions of "Wafer Table (old)"

Revision as of 16:37, 2 March 2010

**SOI wafer table**
Wafer ID	Layerstack	Number bought	Number remaining	Supplier
1I29437.1	675um Si, 1um SiO2, 0.2um Si 1E14 B, 0.5um Si 1E10	21	18	SOITEC+LSRL
1I29437.1	675um Si, 1um SiO2, 0.2um Si 1E14 B, 0.2um Si 1E10	4	0	SOITEC+LSRL
H4JYY8G	?umSi, 1um SiO2, 0.7um Si undoped, 0.3um etch	1	1/4	Numonyx/Intel
HTJYYJG	?umSi, 1um SiO2, 0.7um Si undoped, 0.4um etch	1	1	Numonyx/Intel
HTJYULG	?umSi, 1um SiO2, 0.7um Si undoped, 0.3um etch, Oxidation smoothed	1	1	Numonyx/Intel

@@ Line 4: / Line 4: @@
 ! Wafer ID !! Layerstack !! Data and spec-sheet !! Number bought !! Number remaining !! Supplier !! Design/simulation results
 |-
-| 1I29437.1 || SOITEC: 675um Si, 1um SiO2, 0.2um Si 1E14 B, 0.5um Si 1E10|| &nbsp; || 21 || 18 || SOITEC+LSRL || &nbsp;
+| 1I29437.1 || 675um Si, 1um SiO2, 0.2um Si 1E14 B, 0.5um Si 1E10|| &nbsp; || 21 || 18 || SOITEC+LSRL || &nbsp;
 |-
-| 1I29437.1 || SOITEC: 675um Si, 1um SiO2, 0.2um Si 1E14 B, 0.2um Si 1E10 || &nbsp; || 4 || 0 || SOITEC+LSRL || &nbsp;
+| 1I29437.1 || 675um Si, 1um SiO2, 0.2um Si 1E14 B, 0.2um Si 1E10 || &nbsp; || 4 || 0 || SOITEC+LSRL || &nbsp;
+|-
+| H4JYY8G || ?umSi, 1um SiO2, 0.7um Si undoped, 0.3um etch || &nbsp; || 1 || 1/4 || Numonyx/Intel || &nbsp;
+|-
+| HTJYYJG || ?umSi, 1um SiO2, 0.7um Si undoped, 0.4um etch || &nbsp; || 1 || 1 || Numonyx/Intel || &nbsp;
+|-
+| HTJYULG || ?umSi, 1um SiO2, 0.7um Si undoped, 0.3um etch, Oxidation smoothed || &nbsp; || 1 || 1 || Numonyx/Intel || &nbsp;
 |-
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