Publications
[Recent Publications] [Books] [Journal Articles] [Conference Papers] [Book Chapters] [Patents]
Note: Supervised students/post-docs are delineated with an asterisk (*).
Selected Recent Publications (see the full list below)
[TODAES’24] *Karthik Somayaji NS and Peng Li, “Pareto Optimization of Analog circuits using Reinforcement Learning,” in ACM Trans. on Design Automation of Electronic Systems (to appear), 2024.
[DATE’24] *Yuxuan Yin, Xiaoxiao Wang, Rebecca Chen, Chen He and Peng Li, “Reliable interval prediction of minimum operating voltage based on on-chip monitors via conformalized quantile regression,” in Proc. of IEEE/ACM Design Automation and Test In Europe Conference & Exhibition (DATE), March 2024 (Acceptance rate: 25%).
[AAAI’24] *Yu Wang, *Yuxuan Yin, *Karthik Somayaji NS, Ján Drgoňa, Malachi Schram, Mahantesh Halappanavar, Frank Liu, and Peng Li, “Semi-supervised learning of dynamical systems with neural ordinary differential equations: a teacher-student model approach,” Proceedings of the AAAI Conference on Artificial Intelligence, 2024 (acceptance rate: 2,342/9,862 = 23.75%).
[AAAI’23] *Yu Wang, *Ján Drgoňa, Jiaxin Zhang, *Karthik Somayaji NS, Malachi Schram, Frank Liu, and Peng Li, “AutoNF: Automated architecture optimization of normalizing flows with unconstrained continuous relaxation admitting optimal discrete solution,” Proceedings of the AAAI Conference on Artificial Intelligence, 37(8), 10244-10252(acceptance rate: 1,721/8,777 = 19.6%).
[ITC'23] *Zihu Wang, Hanbin Hu, Chen He, and Peng Li, “Recognizing wafer map patterns using semi-supervised contrastive learning with optimized latent representation learning and data augmentation,” Proceedings of IEEE International Test Conference (ITC), pp. 141-150, Oct. 2023.
[ITC'23] *Yuxuan Yin, Rebecca Chen, Chen He, and Peng Li, “Domain-specific machine learning based minimum operating voltage prediction using on-chip monitor data,” Proceedings of IEEE International Test Conference (ITC), pp. 99-104, Oct. 2023.
[HPCA’22] *Jeong-Jun Li, *Wenrui Zhang, and Peng Li, “Parallel time batching: systolic-array acceleration of sparse spiking neural computation,” IEEE International Symposium on High-Performance Computer Architecture (HPCA), pp. 317-330, Apr. 2022 (acceptance rate: 80/262 = 30.5%)
[TNNLS'23] Lei Deng, Yujie Wu, Yifan Hu, Ling Liang, Guoqi Li, Xing Hu, Yufei Ding, Peng Li, Yuan Xie, “Comprehensive SNN compression using ADMM optimization and activity regularization,” IEEE transactions on neural networks and learning systems, vol. 34, no. 6, pp. 2791-2805, June 2023.
[TNNLS’23] Ling Liang, Xing Hu, Lei Deng, Yujie Wu, Guoqi Li, Yufei Ding, Peng Li, and Yuan Xie, “Exploring adversarial attack in spiking neural networks with spike-compatible gradient,” IEEE Transactions on Neural Networks and Learning Systems, vol. 34, no. 5, pp. 2569-2583, May 2023.
[[PRAB’23] Malachi Schram, Kishansingh Rajput, Karthik Somayaji NS, Peng Li, Jason St. John, and Himanshu Sharma, “Uncertainty aware machine-learning-based surrogate models for particle accelerators: Study at the Fermilab Booster Accelerator Complex,” Phys. Rev. Accel. Beams 26, pp. 044602, Apr. 2023.
[TCAD’22] Ling Liang, Zheng Qu, Zhaodong Chen, Fengbin Tu, Yujie Wu, Lei Deng, Guoqi Li, Peng Li, Yuan Xie, “H2Learn: High-efficiency learning accelerator for high-accuracy spiking neural networks,” IEEE Transactions on Computer-Aided Design of integrated Circuits and Systems, December, vol. 41, no. 11, pp. 4782-4796, Nov. 2022.
[DAC’21] *Karthik Somayaji N.S., *Hanbin Hu, and Peng Li, “Prioritized reinforcement learning for analog circuit optimization with design knowledge,” IEEE/ACM Design Automation Conference, pp. 1231-1236, Dec. 2021 (acceptance rate: 23%).
[DAC’21] *Myung Seok Shim, *Hanbin Hu, and Peng Li, “Reversible gating architecture for rare failure detection of analog and mixed-signal circuits,” IEEE/ACM Design Automation Conference, pp. 901-906, Dec. 2021 (acceptance rate: 23%).
[ITC’21] *Hanbin Hu, Chen He, and Peng Li, “Semi-supervised wafer map pattern recognition using domain-specific data augmentation and contrastive learning,” International Test Conference, pp. 113-122, Oct. 2021.
[ICML’21] *Yukun Yang, *Wenrui Zhang, and Peng Li, “Backpropagated neighborhood aggregation for accurate training of spiking neural networks,” International Conference on Machine Learning (ICML), pp. 11852—11862, Jul. 2021.
[NC’21] *Wenrui Zhang, and Peng Li, “Skip-connected self-recurrent spiking neural networks with joint intrinsic parameter and synaptic weight Training,” Neural Computation (in press), 2021.
[ICCD'20] *Jeongjun Lee, and Peng Li, "Reconfigurable Dataflow Optimization for Spatiotemporal Spiking Neural Computation on Systolic Array Accelerators," The 38th IEEE International Conference on Computer Design (ICCD) (full-length paper acceptance rate 62/221=28%) (Best Paper Award in Processor Architecture Track).
[NeurIPS'20] *Wenrui Zhang, and Peng Li, “Temporal Spike Sequence Learning via Backpropagation for Deep Spiking Neural Networks,” In Advances in Neural Information Processing Systems (NeurIPS), December 2020 (spotlight paper; one of 280 spotlights from 1,900 accepted papers out of 9,454 submissions).
[FiN’20] *Jeongjun Lee, *Renqian Zhang, *Wenrui Zhang, *Yu Liu, and Peng Li, “Spike-train level direct feedback alignment: sidestepping backpropagation for on-chip training of spiking neural nets," Frontiers in Neuroscience, vol. 14, article 143, Mar. 2020.
[FiN’20] *Changqing Xu, *Wenrui Zhang, *Yu Liu, and Peng Li, “Boosting throughput and efficiency of hardware spiking neural accelerators using time compression supporting multiple spike codes,” Frontiers in Neuroscience, vol. 14, article 104, Feb. 2020.
[NeurIPS'19] *Wenrui Zhang, and Peng Li, “Spike-Train Level Backpropagation for Training Deep Recurrent Spiking Neural Networks” In Advances in Neural Information Processing Systems (NeurIPS), pp. 7802-7813, December 2019 (acceptance rate 1428/ 6743).
[FiN’19] *Wenrui Zhang and Peng Li, “Information-theoretic intrinsic plasticity for online unsupervised learning in spiking neural networks,” Frontiers in Neuroscience, vol. 13, article 31, Feb. 2019.
[NeurIPS'19] *Yingyezhe Jin, *Wenrui Zhang, and Peng Li, “Hybrid macro/micro level backpropagation for training deep spiking neural networks,” In Advances in Neural Information Processing Systems (NeurIPS), pp. 7005--7015, December 2018 (acceptance rate 1011/4856 = 20.8%).
[ICCAD'18] *Hanbin Hu, Peng Li, and Jianhua Z. Huang, “Parallelizable Bayesian optimization for analog and mixed-signal rare failure detection with high coverage,” in Proc. of IEEE/ACM Conf. on Computer-Aided Design, 98:1--98:8, pp. November 2018 (acceptance rate: 98/396 = 24.7%) (Best Paper Award Nomination: 6 out of 396 submissions).
[ICCAD'18] Bon Woong Ku, *Yu Liu, *Yingyezhe Jin, Peng Li, and Sung Kyu Lim, “Area-efficient and Low-power Face-to-Face-bonded 3D liquid state machine Design,” in Proc. of IEEE/ACM Conf. on Computer-Aided Design, pp. 121:1--121:6, November 2018 (acceptance rate: 98/396 = 24.7%).
[TCAD’18] *Xin Zhan, Peng Li and E. Sánchez-Sinencio, “Taming the stability-constrained performance optimization challenge of distributed on-chip voltage regulation,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, 2018.
[JETC’18] *Yu Liu, *Yingyezhe Jin, and Peng Li, “Online adaptation and energy minimization for hardware recurrent spiking neural networks,” in ACM Journal on Emerging Technologies in Computing Systems, vo. 14, no. 1, pp. 11:1 – 11:21, Mar. 2018.
[DAC’18] Bon Woong Ku, *Yu Liu, *Yingyezhe Jin, Sandeep Samal, Peng Li, and Sung Kyu Lim, “Design and architectural co-optimization of monolithic 3D liquid state machine-based neuromorphic processor,” in Proc. of IEEE/ACM Design Automation Conference (DAC), pp. 165:1--165:6, June 2018 (acceptance rate: 168/691 = 24.3%).
[DAC’18] *Hanbin Hu, *Qingran Zheng, *Ya Wang, and Peng Li, “HFMV: Hybridizing formal methods and machine Learning for verification of analog and mixed-signal circuits,” in Proc. of IEEE/ACM Design Automation Conference (DAC), pp. 95:1--95:6, June 2018 (acceptance rate: 168/691 = 24.3%).
[QIP’18] Alexandre Y. Yamamoto, Kyle M. Sundqvist, Peng Li, and H. Rusty Harris, “Simulation of a multidimensional input quantum perceptron,” in Quantum Information Processing, (2018) 17: 128.
[JETC’18] *Yu Liu, *Yingyezhe Jin, and Peng Li, “Online adaptation and energy minimization for hardware recurrent spiking neural networks,” in ACM Journal on Emerging Technologies in Computing Systems, vo. 14, no. 1, pp. 11:1 – 11:21, Jan. 2018.
[ISLPED’17] *Yu Liu, *Yingyezhe Jin, and Peng Li, “Exploring sparsity of firing activities and clock gating for energy-efficient recurrent spiking neural processors,” in Proc. of IEEE/ACM Intl. Symp. on Low Power Electronics and Design (ISLPED), pp.1-6, July 2017.
[NanoARCH'16] *Yingyezhe Jin, *Yu Liu, and Peng Li, "SSO-LSM: A sparse and self-organizing architecture for liquid state machine based neural processors," In Proc. of IEEE/ACM International Symposium on Nanoscale Architectures, pp. 55-60, July 2016.
[DAC'16] *Xin Zhan, Peng Li, and Edgar Sanchez-Sinencio, “Distributed on-chip voltage regulation: theoretical stability foundation, over-design reduction and performance optimization,” in Proc. of IEEE/ACM Design Automation Conference, pp. 54:1-54:6, June 2016 (Best Paper Award).
[ISCAS’16] *Qian Wang, *Youjie Li, and Peng Li, “Liquid state machine based pattern recognition on FPGA with firing-activity dependent power gating and approximate computing,” in Proc. of IEEE Intl. Symposium of Circuits and Systems, pp. 361-364, May 2016 (2016 ISCAS Honorary Mention Best Paper Award).
Books [go back to top]
Simulation and Verification of Electronic and Biological Systems, Springer 2011, ISBN 978-94-007-0148-9, Ed. Peng Li, L. Miguel Silveira and Peter Feldmann, with 22 contributors from Boehringer Ingelheim Pharmaceuticals, Designer’s Guide Consulting, Goethe University of Frankfurt, MIT, Sandia National Laboratories, Synopsys, Texas A&M, Texas Instruments, UC Berkeley, UC Davis, UCSF.
Recent Topics on Modeling of Semiconductor Processes, Devices and Circuits, Bentham Publishing (publisher), ISBN: 978-1-60805-074-1, 2011, Ed. Rasit O. Topaloglu and Peng Li, with 18 contributors from Arizona State U., GLOBALFOUNDRIES, IBM, Michigan Tech., National Taiwan U., Nanyang Technological U., Oracle, Texas A&M, Texas Instruments, UCLA, UC Riverside, U. Wisconsin.
Refereed Journal Articles [go back to top]
[J78][NC’21] *Wenrui Zhang, and Peng Li, “Skip-connected self-recurrent spiking neural networks with joint intrinsic parameter and synaptic weight Training,” Neural Computation (in press), 2021.
[J77] [TCBE’20] Yin Sheng, Tingwen Huang, Zhigang Zeng, and Peng Li, “Exponential stabilization of inertial memristive neural networks with multiple time delays,” IEEE Trans. on Cybernetics (accepted Nov. 2019).
[J76] [FiN’20] *Jeongjun Lee, *Renqian Zhang, *Wenrui Zhang, *Yu Liu, and Peng Li, “Spike-train level direct feedback alignment: sidestepping backpropagation for on-chip training of spiking neural nets," Frontiers in Neuroscience, vol. 14, article 143, Mar. 2020.
[J75] [NC’20] Bo Sun, Shiping Wen, Shengbo Wang, Tingwen Huang, Yiran Chen, Peng Li, “Quantized synchronization of memristive neural networks with time-varying delays via super-twisting algorithm,” Neurocomputing, vol. 380, pp. 133-140, Mar. 2020.
[J74][NN’20] You Zhao, Xing He, Tingwen Huang, Junjian Huang, and Peng Li, “A smoothing neural network for minimization l1 -lp in sparse signal reconstruction with measurement noises,” vol. 122, pp. 40-53, Neural Networks, Feb. 2020.
[J73] [NN’20] Shiqin Wang, Yuting Cao, Tingwen Huang, Yiran Chen, Peng Li, Shiping Wen, “Sliding mode control of neural networks via continuous or periodic sampling event-triggering algorithm,” pp. 140-147, vol. 121, Neural Networks, Jan. 2020.
[J72][FiN’20] *Changqing Xu, *Wenrui Zhang, *Yu Liu, and Peng Li, “Boosting throughput and efficiency of hardware spiking neural accelerators using time compression supporting multiple spike codes,” Frontiers in Neuroscience, vol. 14, article 104, Feb. 2020.
[J71][NN’19] Lei Deng, Yujie Wu, Xing Hu, Ling Liang, Yufei Ding, Guoqi Li, Guangshe Zhao, Peng Li, Yuan Xie, “Rethinking the performance comparison between SNNs and ANNs,” Neural Networks, vol. 121, pp. 294-307, Jan. 2020.
[J70][JETCAS’19] *Yu Liu, *Wenrui Zhang, and Peng Li, “Enabling non-Hebbian learning in recurrent spiking neural processors with hardware-friendly on-chip intrinsic plasticity,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, vol. 9, issue 3, pp. 465-474, Sept. 2019.
[J69][TVLSI’19] *Xin Zhan, *Jianhao Chen, E. Sánchez-Sinencio, and Peng Li, "Power management for multicore processors via heterogeneous voltage regulation and machine learning enabled adaptation," in IEEE Trans. on Very Large Scale Integration Systems, vol. 27, issue 11, pp. 2641-2654, Nov. 2019.
[J68][TCAS2’19] Joseph Riad, Peng Li and E. Sánchez-Sinencio, “A stabilizing centralized controller for on-chip power delivery networks,” IEEE Transactions on Circuits and Systems II: Express Briefs, pp. 680-684, vol. 67, no. 4, Apr. 2020.
[J67] [JETC’19] *Yu Liu, * Sai Sourabh Yenamachintala, and Peng Li, “Energy-efficient FPGA spiking neural accelerators with supervised and unsupervised spike-timing-dependent-plasticity,” in ACM Journal on Emerging Technologies in Computing Systems, vol. 15, no. 3, pp. 27:1--27:19, May 2019.
[J66] [TCAD’19] *Xin Zhan, Peng Li and E. Sánchez-Sinencio, “Taming the stability-constrained performance optimization challenge of distributed on-chip voltage regulation,” IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 38, no. 8, pp. 1571-1584, Aug. 2019.
[J65] [FiN’19] *Wenrui Zhang and Peng Li, “Information-theoretic intrinsic plasticity for online unsupervised learning in spiking neural networks,” in Frontiers in Neuroscience, vol. 13, article 31, Feb. 2019.
[J64] [TVLSI’18] *Xin Zhan, Joseph Riad, Peng Li and E. Sánchez-Sinencio, "Design space exploration of distributed on-chip voltage regulation under stability constraint," in IEEE Trans. on Very Large Scale Integration Systems, vol. 26, issue 8, pp. 1580-1584, August 2018.
[J63] [QIP’18] Alexandre Y. Yamamoto, Kyle M. Sundqvist, Peng Li, and H. Rusty Harris, “Simulation of a multidimensional input quantum perceptron,” in Quantum Information Processing, (2018) 17: 128. [J62] [JETC’18] *Yu Liu, *Yingyezhe Jin, and Peng Li, “Online adaptation and energy minimization for hardware recurrent spiking neural networks,” in ACM Journal on Emerging Technologies in Computing Systems, vo. 14, no. 1, pp. 11:1 – 11:21, Jan. 2018.
[J61] [IET’18] Changqing Xu, Yi Liu, Peng Li, and Yintang Yang, “Unified Multi-objective Mapping for Network-on-chip Using Genetic based Hyper-heuristic Algorithms,” IET Computers & Digital Techniques, Jan. 2018. [J60] [TODAS’17] *Ya Wang, *Di Gao, Dani Tannir, Ning Dong, G. Peter Fang, Wei Dong, and Peng Li, “Multi-harmonic small-signal modeling of low power PWM DC-DC converters,” in ACM Trans. on Design Automation of Electronic Systems, vo. 22, issue 4, pp. 68:1-68:16, June 2017.
[J59] [NeuroComp’17] *Yingyezhe Jin and Peng Li, “Performance and robustness of bio-inspired digital liquid state machines: A case study of speech recognition,” Neurocomputing, vo. 226, pp. 146-160, Feb. 2017.
[J58] [NeuroComp’17] *Qian Wang, *Youjie Li, *Botang Shao, *Siddhartha Dey, and Peng Li, “Energy efficient parallel neuromorphic architectures with approximate arithmetic on FPGA,” Neurocomputing, vo. 221, pp. 146-158, Jan. 2017.
[J57] [TCAD’16] *Ya Wang and Peng Li, “Robust and efficient transistor-level envelope-following analysis of PWM/PFM/PSM DC-DC converters,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vo. 35, issue 11, pp. 1836-1847, Nov. 2016.
[J56] [D&T’16] *Parijat Mukherjee and Peng Li, “Using presilicon knowledge to excite nonlinear failure modes in large mixed-signal circuits,” in IEEE Design & Test, vo. 33, issue 5, pp. 28-34, Oct. 2016.
[J55] [JETC’16] *Qian Wang, Yongtae Kim, and Peng Li, “Neuromorphic processors with memristive synapses: synaptic interface and architectural exploration,” in ACM Journal on Emerging Technologies in Computing Systems, vo. 12, issue 14, pp. 35:1 – 35:22, Jul. 2016.
[J54] [TODAES’16] Dani A. Tannir, *Ya Wang, and Peng Li, “Accurate modeling of nonideal low power PWM DC-DC converters operating in CCM and DCM using enhanced circuit averaging techniques,” in ACM Trans. on Design Automation of Electronic Systems. vo. 21, issue 4, pp. 61:1--61:15, May 2016.
[J53] [TNNLS1’15] *Yong Zhang, Peng Li, *Yingyezhe Jin, and Yoonsuck Choe, “A digital liquid state machine with biologically inspired learning and its application to speech recognition,” IEEE Trans. on Neural Networks and Learning Systems, vol. 26, no. 11, pp. 2635-2649, Nov. 2015.
[J52][TVLSI’15] *Yongtae Kim, *Yong Zhang, and Peng Li, “Energy efficient approximate arithmetic for error resilient neuromorphic computing,” IEEE Trans. on Very Large Scale Integration Systems, vol. 23, no. 11, pp. 2733-2737, Nov. 2015.
[J51] [TCAD’15] *Honghuang Lin and Peng Li, “Circuit performance classification with active learning guided sampling for support vector machines,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 34, no. 9, pp.1467-1480, Sep. 2015.
[J50] [TVLSI’15] *Qian Wang, Peng Li, and *Yongtae Kim, “A parallel digital VLSI architecture for integrated support vector machine training and classification,” IEEE Trans. on Very Large Scale Integration Systems, vol. 23, no. 8, pp. 1471-1484, Aug. 2015.
[J49] [TODAES’15] *Tong Xu, Peng Li, and Savithri Sundareswaran, “Decoupling capacitance design strategies for power delivery networks with power gating,” ACM Trans. on Design Automation of Electronic Systems, vol. 20, no. 3, pp. 38:1-38:30, Jun. 2015.
[J48] [TCAS1’15] *Botang Shao and Peng Li, “Array-based approximate arithmetic computing: A general model and applications to multiplier and squarer design,” IEEE Trans. on Circuits and Systems I, 2014, vol. 62. no. 4, pp. 1081-1090, Apr. 2015.
[J47] [JETC’15] *Yongtae Kim, *Yong Zhang, and Peng Li, “A reconfigurable digital neuromorphic processor with memristive synaptic crossbar for cognitive computing,” ACM Journal on Emerging Technologies in Computing Systems, vol. 11, no. 4, pp. 38:1-38:25, Apr. 2015.
[J46][NN’15] Shiping Wen, Tingwen Huang, Zhigang Zhang, Yiran Chen, and Peng Li, “Circuit design and exponential stabilization of memristive neural networks,”Neural Networks, vol. 63, pp. 48-56, 2015.
[J45] [TODAS’14]Yenpo Huang, Garng M. Huang and Peng Li, “Understanding SRAM stability via bifurcation analysis: analytical models and scaling trends,” ACM Trans. on Design Automation of Electronic Systems, vol. 19, no. 4, pp. 41:1—41:25, Aug. 2014.
[J44] [TCAD’13] *Suming Lai, *Boyuan Yan, and Peng Li, “Localized stability checking and design of IC power delivery with distributed voltage regulators,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, pp. 1321-1333, September 2013.
[J43][TVLSI’13] Zhuo Feng and Peng Li, “Fast thermal analysis on GPU for 3D-ICs with integrated microchannel cooling,” in IEEE Trans. on Very Large Scale Integration Systems, volume 21, issue 8, pp. 1526-1539, August 2013.
[J42] [TCAD’13] *Leyi Yin, Yue Deng, and Peng Li, “Simulation-assisted formal verification of nonlinear mixed-signal circuits with Bayesian inference guidance,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, pp. 977-990, July 2013.
[J41] [AICSP’13] *Yongtae Kim and Peng Li, “A 0.003-mm2, 0.35-V, 82-pJ/conversion ultra-low power CMOS all digital temperature sensor for on-die thermal management,” Analog Integrated Circuits and Signal Processing, volume 75, issue 1, pp 147-156, April 2013.
[J40] [TODAES’13] *Zhiyu Zeng, *Suming Lai and Peng Li, “IC power delivery: voltage regulation and conversion, system-level co-optimization and technology implications,” in ACM Trans. on Design Automation of Electronic Systems, volume 18, issue 2, pp. 29:1 - 29:21, March 2013.
[J39] [NeuroImage'13] *Boyuan Yan and Peng Li, "The emergence of abnormal hypersynchronization in the anatomical structural network of human brain,” NeuroImage, volume 65, pp. 34-51, January 2013 (impact factor: 6.608).
[J38] [IET-CDS’13] *Yongtae Kim and Peng Li, “'A 0.38-V Near/Sub-VT Digitally Controlled Low-Dropout Regulator with Enhanced Power Supply Noise Rejection in 90-nm CMOS Process,” IET Circuits, Devices and Systems, volume 7, issue 1, pp. 31-41, January 2013.
[J37] [NeuroComp’12] *Yong Zhang, *Boyuan Yan, *Mingchao Wang, *Jingzhen Hu, *Haokai Lu and Peng Li, “Linking brain behavior to underlying cellular mechanisms via large-scale brain modeling and simulation,” Neurocomputing, Neurocomputing, vo. 97, pp. 317-331, Nov. 2012.
[J36] [TCAD'12] *Parijat Mukherjee, G. Peter Fang, Rod Burt, and Peng Li, “Efficient identification of unstable loops in large linear analog integrated circuits,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 31, issue 9, pp. 1332-1345, September 2012.
[J35] [AICSP’12] *Suming Lai and Peng Li, “A fully on-chip area-efficient CMOS low-dropout regulator with fast load regulation,” Analog Integrated Circuits and Signal Processing, vol. 72, no. 2, pp. 433-450, August 2012.
[J34] [CPC’12] *Haokai Lu and Peng Li, “Stochastic projective methods for simulating stiff chemical reacting systems,” Computer Physics Communications, vol. 183, issue 7, pp. 1427–1442, July 2012.
[J33] [TCBB’11] *Yong Zhang, Peng Li and Garng M. Huang, “Quantifying dynamic stability of genetic memory circuits,” IEEE/ACM Transactions on Computational Biology and Bioinformatics, vol. 9, issue 3, pp. 871-884, May 2012. [J32] [FTEDA’11] Peng Li, “Parallel Circuit Simulation: A Historical Perspective and Recent Developments,” Foundations and Trends in Electronic Design Automation: Vol. 5: No 4, pp 211-318, 2011 (invited) [or find paper here].
[J31] [TODAES’11] *Wei Dong and Peng Li, “Parallel circuit simulation with adaptively controlled projective integration,” in ACM Trans. on Design Automation of Electronic Systems, vol. 16, no.4, October 2011.
[J30] [PLoS One’11] *Boyuan Yan and Peng Li, “An integrative view of mechanisms underlying generalized spike-and-wave epileptic seizures and its implication on optimal therapeutic treatments,” PLoS One 6(7): e22440. doi:10.1371/journal.pone.0022440 (impact factor 4.441, July 2011, 20 pages).
[J29] [TVLSI’11] Zhuo Feng, *Zhiyu Zeng and Peng Li, “Parallel on-chip power distribution network analysis on multi-core-multi-GPU platforms,” in IEEE Trans. on Very Large Scale Integration Systems, vol. 19, no. 10, pp. 1823-1836, October 2011.
[J28] [TODAES’11] *Zhiyu Zeng, Zhuo Feng, Peng Li and Vivek Sarin, “Locality-driven parallel static analysis for power delivery networks,” in ACM Trans. on Design Automation of Electronic Systems, 16, 3, Article 28, 17 pages, June 2011.
[J27] [TCAS’11] Yenpo Ho, Garng M. Huang and Peng Li, “Dynamical properties and design analysis for nonvolatile memristor memories,” in IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications, vol. 58, no. 4, pp. 724-736, April 2011.
[J26] [TCAD’11] *Guo Yu and Peng Li, “Hierarchical analog/mixed-signal circuit optimization under process variations and tuning,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 30, no. 2, pp. 313-317, February, 2011.
[J25] [JCN’11] *Boyuan Yan and Peng Li, “Reduced order modeling of passive and quasi-active dendrites for nervous system simulation,” J Comput Neurosci (2011) 31:247–271.
[J24] [TCAD’11] *Xaioji Ye, *Wei Dong, Peng Li and Sani Nassif, “Hierarchical multialgorithm parallel circuit simulation,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 30, issue 1, pp. 45-58, January 2011.
[J23] [TCAD’10] *Xaioji Ye, Peng Li, Min Zhao, Rajendran Panda and Jiang Hu, “Scalable analysis of mesh-based clock distribution networks using application-specific reduced order modeling,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems , vol. 29, no. 9, pp. 1342-1353, September 2010 (TCAD best paper award nomination).
[J22] [TVLSI’10] Rupak Samanta, Jiang Hu and Peng Li, “Discrete buffer and wire sizing for link-based non-tree clock networks,” in IEEE Trans. on Very Large Scale Integration Systems, vol. 18, no. 7, pp. 1025 – 1035, July 2010.
[J21] [JLPE’10] *Akshit Dayal, Peng Li and Garng M. Huang, “Robust SRAM design via joint sizing and voltage optimization under dynamic stability constraints,” in Journal of Low Power Electronics, vol. 6, no. 1, Apr. 2010.
[J20] [JLPE’10] *Guo Yu and Peng Li, “Exploring circuit adaptation for yield optimization of low-power all-digital PLLs,” Journal of Low Power Electronics, vol. 6, no. 1, Apr. 2010.
[J19] [TCAS’10] *Xiaoji Ye, Peng Li and Frank Liu, “Exact time-domain second-order adjoint sensitivity computation for linear circuit analysis and optimization,” in IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications, vol. 57, no. 1, pp. 236-248, January 2010.
[J18] [TVLSI’09] Ganesh Venkataraman, *Zhuo Feng, Jiang Hu, Peng Li, “Combinatorial algorithms for fast clock mesh optimization,” in IEEE Trans. on Very Large Scale Integration Systems, vol. 18, no. 1, pp. 131-141, Jan. 2010.
[J17] [IET’09] *Zhuo Feng, Peng Li and Zhuoxiang Ren, “SICE: design-dependent statistical interconnect corner extraction under inter/intra-die variations,” IET Circuits, Devices & Systems, vol. 3, iss. 5, pp. 248-258, 2009.
[J16] [TCAD’09] *Zhiyu Zeng and Peng Li, “Locality-driven parallel power grid optimization,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 8, pp. 1190-1200, August 2009.
[J15] [TCAD’09] *Wei Dong and Peng Li, “A parallel harmonic balance approach to steady-state and envelope-following simulation of driven and autonomous circuits,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 24, no. 4, pp. 490-501, April 2009.
[J14] [TCAD’09] *Zhuo Feng, Peng Li and Yaping Zhan, “An on-the-fly parameter dimension reduction approach to fast second-order statistical static timing analysis,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 28, no. 1, pp. 141-153, January 2009.
[J13] [TVLSI’09] *Zhuo Feng and Peng Li, “Performance-oriented parameter dimension reduction of VLSI circuits,” in IEEE Trans. on Very Large Scale Integration Systems, vol. 17, no. 1, pp. 137-150, January 2009.
[J12] [TCAD’08] Yang Yi, Peng Li, Vivek Sarin and Weiping Shi, "A preconditioned hierarchical algorithm for impedance extraction of three-dimensional structures with multiple dielectrics," in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 11, pp. 1918-1927, November 2008.
[J11] [TCAD’08] *Guo Yu, *Wei Dong, *Zhuo Feng and Peng Li, “Statistical static timing analysis considering process variation model uncertainty,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 10, pp. 1880-1890, Oct. 2008.
[J10] [TCAD’07] *Wei Dong and Peng Li, “Hierarchical harmonic balance methods for frequency-domain analog circuits analysis,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 12, pp. 2089-2101, December. 2007.
[J9] [TVLSI’07] Peng Li, *Zhuo Feng and Emrah Acar, “Characterizing multi-stage nonlinear drivers and variability for accurate timing and noise analysis,” in IEEE Trans. on Very Large Scale Integration Systems, vol. 15, no. 11, pp. 1205-1214, November 2007.
[J8] [TCAS’07] *Guo Yu and Peng Li, “Efficient lookup table based modeling for robust design of Sigma-Delta ADCs,” in IEEE Trans. on Circuits and Systems I: Fundamental Theory and Applications, vol. 54, no. 7, pp. 1513-1528, July 2007.
[J7] [TVLSI’07] Shiyan Hu, Qiuyang Li, Jiang Hu and Peng Li, “Utilizing redundancy for timing critical interconnect,” in IEEE Trans. on Very Large Scale Integration Systems, vol. 15, no. 10, pp. 1067-1080, October 2007.
[J6] [TVLSI’07] *Xiaoji Ye, Frank Liu, and Peng Li, “Fast variational interconnect delay and slew computation using quadratic models,” in IEEE Trans. on Very Large Scale Integration Systems, vol. 15, no. 8, pp. 913-926, August 2007.
[J5] [TCAD’06] Peng Li, “Statistical sampling-based parametric analysis of power grids,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 12, pp. 2852-2867, December 2006.
[J4] [TCAD’06] Peng Li, Lawrence Pileggi, Mehdi Asheghi and Rajit Chandra, “IC thermal simulation and modeling via efficient multigrid-based techniques,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 25, no. 9, pp. 1763-1776, September, 2006.
[J3] [JLOPE’06] Yangdong Deng and Peng Li, “Temperature-aware floorplanning of 3-D ICs considering thermally dependent leakage power,” Journal of Low Power Electronics, vol. 2, no.2, August 2006.
[J2] [TCAD’05] Peng Li and Lawrence Pileggi, “Compact reduced-order modeling of weakly nonlinear analog and RF circuits,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 23, no. 2, pp. 184-203, Feb, 2005 (The most downloaded IEEE TCAD publication in 2005).
[J1] [TCAD’03] Peng Li and Lawrence Pileggi, “Efficient per-nonlinearity distortion analysis for analog and RF circuits,” in IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems, vol. 22, no. 10, pp. 1297-1309, October 2003.
Referred Conference Papers [go back to top]
[147][ISQED’20] *Yu Wang, *Jeong-Jun Lee, Yu Ding, and Peng Li, “A scalable FPGA engine for parallel acceleration of singular value decomposition,” in Proc. of IEEE Symp. on Quality Electronic Design, March 2020.
[C146][ISQED’20] Joseph Riad, *Jianhao Chen, Edgar Sánchez-Sinencio, and Peng Li “Variation-Aware heterogeneous voltage Regulation for multi-core systems-on-a-chip with on-chip machine learning,” in Proc. of IEEE Symp. on Quality Electronic Design, March 2020.
[C145][NeurIPS'19] *Wenrui Zhang, and Peng Li, “Spike-Train Level Backpropagation for Training Deep Recurrent Spiking Neural Networks” In Advances in Neural Information Processing Systems (NeurIPS), pp. 7802-7813, December 2019 (acceptance rate 1428/ 6743).
[C144][Techcon’19] *Hanbin Hu, *Yukun He, and Peng Li, “Assessment of machine learning robustness for analog and mixed signal verification,” 4 pages, Semiconductor Research Corporation TECHCON Conference, 4 pages, September 2019.
[C143][DAC’19] *Hanbin Hu, Peng Li, and Jianhua Huang, “Enabling high-dimensional Bayesian optimization for efficient failure detection of analog and mixed-signal circuits,” in Proc. of IEEE/ACM Design Automation Conference (DAC), pp. 17:1--17:6, June 2019.
[C142][NeurIPS’18] *Yingyezhe Jin, *Wenrui Zhang, and Peng Li, “Hybrid macro/micro level backpropagation for training deep spiking neural networks,” In Advances in Neural Information Processing Systems (NeurIPS/NIPS), pp. 7005 -- 7015, December 2018 (acceptance rate 1011/4856 = 20.8%).
[C141][ICCAD'18] *Hanbin Hu, Peng Li, and Jianhua Z. Huang, “Parallelizable Bayesian optimization for analog and mixed-signal rare failure detection with high coverage,” in Proc. of IEEE/ACM Conf. on Computer-Aided Design, pp. 98:1--98:8, November 2018 (acceptance rate: 98/396 = 24.7%) (Best Paper Award Nomination: 6 out of 396 submissions).
[C140] [ICCAD'18] Bon Woong Ku, *Yu Liu, *Yingyezhe Jin, Peng Li, and Sung Kyu Lim, “Area-efficient and low-power face-to-face-bonded 3D liquid state machine design,” in Proc. of IEEE/ACM Conf. on Computer-Aided Design, pp. pp. 121:1--121:6, November 2018 (acceptance rate: 98/396 = 24.7%).
[C139][Techcon’18] *Yu, Liu, and Peng Li, “Performance Enhancement for FPGA recurrent spiking neural accelerators with supervised and unsupervised spike-timing-dependent plasticity,” 4 pages, Semiconductor Research Corporation TECHCON Conference, 4 pages, September 2018.
[C138][Techcon’18] *Hanbin Hu, and Peng Li, “A hybrid verification framework for analog and mixed-signal circuits,” 4 pages, Semiconductor Research Corporation TECHCON Conference, 4 pages, September 2018.
[C137][DAC’18] Bon Woong Ku, *Yu Liu, *Yingyezhe Jin, Sandeep Samal, Peng Li, and Sung Kyu Lim, “Design and architectural co-optimization of monolithic 3D liquid state machine-based neuromorphic processor,” in Proc. of IEEE/ACM Design Automation Conference (DAC), pp. 165:1--165:6, June 2018 (acceptance rate: 168/691 = 24.3%).
[C136][DAC’18] *Hanbin Hu, *Qingran Zheng, *Ya Wang, and Peng Li, “HFMV: Hybridizing formal methods and machine Learning for verification of analog and mixed-signal circuits,” in Proc. of IEEE/ACM Design Automation Conference (DAC), pp. 95:1--95:6, June 2018 (acceptance rate: 168/691 = 24.3%).
[C135] [Techon’17] *Yu Liu, *Yingyezhe Jin, and Peng Li, “Energy minimization for self-organizing recurrent spiking neural processors,” Semiconductor Research Corporation TECHCON Conference, 4 pages, September 2017.
[C134] [ISLPED’17] *Yu Liu, *Yingyezhe Jin, and Peng Li, “Exploring sparsity of firing activities and clock gating for energy-efficient recurrent spiking neural processors,” in Proc. of IEEE/ACM Intl. Symp. on Low Power Electronics and Design (ISLPED), July 2017.
[C133][DAC'17] *Ya Wang, Peng Li, and Jian Gong, “Convergence-boosted graph partitioning using maximum spanning trees for iterative solution of large linear circuits,” in Proc. of IEEE/ACM Design Automation Conference (DAC), June 2017.
[C132][IJCNN'17] *Yingyezhe Jin, and Peng Li, "Calcium-modulated supervised spike-timing-dependent plasticity for readout training and sparsification of the liquid state machine," In Proc. of International Joint Conference on Neural Networks, May 2017.
[C131][IJCNN'17] *Myung Seok Shim, and Peng Li, "Biologically inspired reinforcement learning for mobile robot collision avoidance," In Proc. of International Joint Conference on Neural Networks, May 2017.
[C130][IJCNN'17] *Amarnath Mahadevuni, and Peng Li, "Navigating mobile robots to target in near shortest time using reinforcement learning with spiking neural networks," In Proc. of International Joint Conference on Neural Networks, May 2017.
[C129][ICICDT'17] Honghuang Lin, Asad M. Khan, and Peng Li, “Statistical circuit performance dependency analysis via sparse relevance kernel machine,” in Proc. of IEEE International Conference on IC Design and Technology (ICICDT), May 2017 (invited).
[C128] [DATE’17] *Ang Li, Peng Li, Tingwen Huang, and Edgar Sanchez-Sinencio, “Noise-sensitive feedback loop identification in linear time-varying analog circuits,” in Proc. of IEEE/ACM Design Automation and Test In Europe Conference & Exhibition (DATE), pp. 1285-1288, March 2017.
[C127][ICPR'16] *Qian Wang, and Peng Li, "D-LSM: Deep liquid state machine with unsupervised recurrent reservoir tuning," In Proc. of The International Conference on Pattern Recognition, pp. 1158-1165, December 2016.
[C126][IJCNN'16] *Yingyezhe Jin, and Peng Li, "AP-STDP: A novel self-organizing mechanism for efficient reservoir computing," In Proc. of The International Joint Conference on Neural Networks, pp. 1158-1165, July 2016.
[C125][NanoARCH'16] *Yingyezhe Jin, *Yu Liu, and Peng Li, "SSO-LSM: A sparse and self-organizing architecture for liquid state machine based neural processors," In Proc. of IEEE/ACM International Symposium on Nanoscale Architectures, pp. 55-60, July 2016.
[C124][DAC'16] *Xin Zhan, Peng Li, and Edgar Sanchez-Sinencio, “Distributed on-chip voltage regulation: theoretical stability foundation, over-design reduction and performance optimization,” in Proc. of IEEE/ACM Design Automation Conference, pp. 54:1-54:6, June 2016 (Best Paper Award).
[C123][DAC'16] *Honghuang Lin and Peng Li, “Relevance vector and feature machine for statistical analog circuit characterization and built-in self-test optimization,” in Proc. of IEEE/ACM Design Automation Conference, pp. 11:1-11:6, June 2016.
[C122] [DATE’16] *Ya Wang, *Di Gao, Dani A. Tannir, and Peng Li, “Multi-harmonic nonlinear modeling of low-power PWM DC-DC converters operating in CCM and DCM,” in Proc. of Design Automation and Test In Europe Conference (DATE), pp. 409-414, March 2016, (long presentation, acceptance rate 24%).
[C121][ISCAS’16] *Qian Wang, *Youjie Li, and Peng Li, “Liquid state machine based pattern recognition on FPGA with firing-activity dependent power gating and approximate computing,” in Proc. of IEEE Intl. Symposium of Circuits and Systems, pp. 361-364, May 2016 (2016 ISCAS Honorary Mention Best Paper Award).
[C120] [FAC’15] *Parijat Mukherjee and Peng Li, “Functional testing of large mixed-signal circuits with non-linear dynamics using pre-silicon knowledge,” Frontiers in Analog CAD (FAC) Workshop, 2 pages, November, 2015.
[C119][BioCAS’15] *Qian Wang, *Yingyezhe Jin, and Peng Li, “General-purpose LSM learning processor architecture and theoretically guided design space exploration,” in Proc. of IEEE Biomedical Circuits and Systems Conference, pp. 1-4, Oct. 2015 (lecture presentation; acceptance rate 13.0%, 45/345).
[C118] [TECHCON’15] *Honghuang Lin and Peng Li, “Classifying circuit performance using active-learning guided support vector machines,” Semiconductor Research Corporation TECHCON Conference, 4 pages, September 2015.
[C117][NFM'15] Andrew Fisher, Chris Myers, and Peng Li, “Reachability analysis using extremal rates,” in Proc. of NASA Formal Methods Symposium, April 2015 (acceptance rate: 30.6%).
[C116] [ICCAD'14] *Ya Wang, Peng Li and *Suming Lai, "A unifying and robust method for efficient envelope-following simulation of PWM/PFM DC-DC converters," in Proc. of IEEE/ACM Conf. on Computer-Aided Design, pp. 618-625, November 2014 (acceptance rate: 25.3%, 77/304).
[C115] [IEEENano'14] *Qian Wang, *Yongtae Kim and Peng Li, "Architectural design exploration for neuromorphic processors with memristive synapses," in Proc. of IEEE Intl. Conference on Technology, pp. 962-966, August 2014.
[C114] [ISLPED'14] *Botang Shao and Peng Li, “A model for array-based approximate arithmetic computing with application to multiplier and squarer design,” in Proc. of IEEE/ACM Intl. Symp. on Low Power Electronics and Design (oral presentation), pp. 9-14, August 2014 (acceptance rates: 23%(oral presentation), 34% (overall) ).
[C113] [MWSCAS'14] *Ahmad Bashaireh and Peng Li, “Design robustness analysis of digital spiking neural circuits,” in Proc. of IEEE Int'l Midwest Symposium on Circuits & Systems, pp. 737-740, August 2014.
[C112] [DAC'14] *Parijat Mukherjee, Chirayu Amin and Peng Li, “Approximate property checking of mixed-signal circuits,” in Proc. of IEEE/ACM Design Automation Conference, pp. 1-6, June 2014 (acceptance rate: 22.1/%, 174/787) and also in Proc. of ACM Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, March 2014.
[C111][DAC'14] *Honghuang Lin and Peng Li, “Parallel hierarchical reachability analysis for analog verification,” in Proc. of IEEE/ACM Design Automation Conference, pp. 1-6, June 2014 (acceptance rate: 22.1/%, 174/787).
[C110][DAC'14] *Parijat Mukherjee and Peng Li, “Leveraging pre-silicon data to diagnose out-of-specification failures in mixed-signal circuits,” in Proc. of IEEE/ACM Design Automation Conference, pp. 1-6, June 2014 (acceptance rate: 22.1/%, 174/787).
[C109] [ICCAD'13] *Yongtae Kim, *Yong Zhang and Peng Li, "An energy efficient approximate adder with carry skip for error resilient neuromorphic VLSI systems,” IEEE/ACM Conf. on Computer-Aided Design, pp. 130-137, November 2013 (acceptance rate: 26.0%, 92/354).
[C108] [BioMedCom'13] *Shaoda Yu, Peng Li, *Honghuang Lin, Ehsan Rohani, Gwan Choi, *Botang Shao and *Qian Wang, "Support vector machine based detection of drowsiness using minimum EEG features," ASE/IEEE Intl. Conf. on Biomedical Computing, pp. 827-835, September 2013.
[C107] [TECHCON0’13] *Yongtae Kim, *Yong Zhang and Peng Li, “A brain-inspired digital neuromorphic VLSI architecture with memristive crossbar for cognitive computing,” SRC TECHCON, 4 pages, September 2013.
[C106] [TECHCON0’13] *Parijat Mukherjee, Chirayu Amin, Peng Li, “A formal approach to DC operating point analysis for large mixed signal circuits: challenges and opportunities,” SRC TECHCON, 4 pages, September 2013.
[C105] [TECHCON0’13] *Suming Lai, *Boyuan Yan, and Peng Li, “Stability-ensured design methodology for distributed on-chip linear voltage regulators in modern IC power delivery networks,” SRC TECHCON, 4 pages, September 2013.
[C104][DAC’13] *Honghuang Lin, Peng Li and Chris J. Myers, “Verification of digitally-intensive analog circuits via kernel ridge regression and hybrid reachability analysis,” in Proc. of IEEE/ACM Design Automation Conf., pp. 1-6, May 2013 (acceptance rate: 21.7%, 162/747) .
[C103] [TAU’13] *Parijat Mukherjee, Chirayu Amin and Peng Li, “A formal approach to DC operating point analysis for large mixed signal circuits: challenges and opportunities,” in Proc. of ACM Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, March 2013.
[C102] *Honghuang Lin and Peng Li, “Reachability analysis for AMS verification using hybrid support function and SMT-based method,” Frontiers in Analog CAD (FAC) Workshop, 2 pages, February, 2013.
[C101] [ISQED’13] *Suming Lai and Peng Li, “A power-efficient on-chip linear regulator assisted by switched capacitors for fast transient regulation,” in Proc. of IEEE Symp. on Quality Electronic Design, pp. 682-688, March 2013.
[C100][ICCAD'12] *Suming Lai, *Boyuan Yan and Peng Li, "Stability assurance and design optimization of large power delivery networks with multiple on-chip voltage regulators,” IEEE/ACM Conf. on Computer-Aided Design, pp. 247-254, November 2012 (acceptance rate: 24.3%, 82/338) (IEEE/ACM William J. McCalla ICCAD Best Paper Award, one out of 338 submissions).
[C99][ICCAD'12] Peng Li, "Design analysis of IC power delivery,” IEEE/ACM Conf. on Computer-Aided Design (invited paper), pp. 664-666, November 2012.
[C98][ICCAD'12] *Leyi Yin, *Yue Deng and Peng Li, "Verifying dynamic properties of nonlinear mixed-signal circuits via efficient SMT-based techniques,” IEEE/ACM Conf. on Computer-Aided Design, pp. 436-442, November 2012 (acceptance rate: 24.3%, 82/338).
[C97][ICCAD'12] *Honghuang Lin and Peng Li, "Classifying circuit Performance using active-learning guided support vector machines,” IEEE/ACM Conf. on Computer-Aided Design, pp. 187-194, November 2012 (acceptance rate: 24.3%, 82/338).
[C96] [VLSI-SoC'12] Bin Wu and Peng Li, "Load-aware stochastic feedback control for DVFS with tight performance guarantee,” IEEE/ IFIP Int. Conf. on VLSI and System-on-Chip, pp. 231-236, October 2012.
[C95] [TECHCON0’12] *Tong Xu and Peng Li, “Design tradeoffs and strategies of power gating with DVFS,” SRC TECHCON, 4 pages, September 2012.
[C94] [TECHCON0’12] *Yongtae Kim and Peng Li, “An on-chip variation tolerant digital LDO regulator for extremely low voltage applications,” SRC TECHCON, 4 pages, September 2012. [C93] [SOCC'12] *Yongtae Kim, *Yong Zhang and Peng Li, "A digital neuromorphic VLSI architecture with memristor crossbar synaptic array for machine learning”, IEEE Int. System-on-Chip Conf., pp. 328-333, September 2012.
[C92] [ICDCT’12] *Suming Lai, Peng Li and Zhiyu Zeng, “Design and analysis of IC power delivery with on-chip voltage regulation,” International Conference on IC Design and Technology, pp. 1-4, May 2012 (invited).
[C91] [ISQED’12] *Yongtae Kim and Peng Li, “An ultra-Low voltage digitally controlled low-dropout regulator with digital background calibration,” in Proc. of IEEE Symp. on Quality Electronic Design, pp. 151-158, March 2012.
[C90] [ISQED’12] *Tong Xu and Peng Li, “Design and optimization of power gating for DVFS applications,” in Proc. of IEEE Symp. on Quality Electronic Design, pp. 391-397, March 2012.
[C89] [ICCAD’11] *Zhiyu Zeng, *Tong Xu, Zhuo Feng and Peng Li, “Fast static analysis of power grids: algorithms and implementations,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 488-493, November 2011 (invited).
[C88] [TECHCON0’11] *Zhiyu Zeng, *Suming Lai and Peng Li, “IC power delivery: voltage regulation, conversion and system-level co-optimization,” SRC TECHCON, 4 pages, September 2011.
[C87] [IJCNN’11] *Mingchao Wang, *Boyuan Yan, *Jingzhen Hu and Peng Li, “Simulation of large neuronal networks with biophysically accurate models on graphics processors,” IEEE International Joint Conference on Neural Networks, pp. 3184-3193, July 2011.
[C86] [DAC’11] *Parijat Mukherjee, Peter Fang, Rod Burt, and Peng Li, “Automatic stability checking for large linear analog integrated circuits,” IEEE/ACM Design Automation Conference, pp. 304-309, June 2011 (acceptance rate 22.6%) (Best paper award, 1 out of 690 submissions, <1%).
[C85] [DAC’11] *Tong Xu, Peng Li and *Boyuan Yan, “Decoupling for power gating: sources of power noise and design strategies,” IEEE/ACM Design Automation Conference, pp. 1002-1007, June 2011 (acceptance rate 22.6%).
[C84] [DAC’11] *Leyi Yin, *Yongtae Kim and Peng Li “High effective-resolution built-in jitter characterization with quantization noise shaping,” IEEE/ACM Design Automation Conference, pp. 765-770, June 2011 (acceptance rate 22.6%).
[C83] [TAU’11] *Tong Xu, Peng Li and *Boyuan Yan, “Decoupling strategies for reducing power gating induced supply noise,” in Proc. of ACM Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, March 2011.
[C82] [ISQED’11] *Leyi Yin and Peng Li, “RF BIST for ADPLL-based polar transmitters with wide-band DCO gain calibration,” in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 303-340, March 2011.
[C81] [ISQED’11] *Zhiyu Zeng, Zhuo Feng and Peng Li, “Efficient checking of power delivery integrity for power gating,” in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 663-670, March 2011.
[C80] [ICCAD’10] *Xiaoji Ye and Peng Li, “On-the-fly runtime adaptation for efficient execution of parallel multi-algorithm circuit simulation,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 298-304, November 2010 (acceptance rate 30%).
[C79] [ICCAD’10] *Amandeep Singh and Peng Li, “On behavioral model equivalence checking for large analog/mixed signal systems,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 55-61, November 2010 (acceptance rate 30%).
[C78] [ICCAD’10] Zhuo Feng and Peng Li, “Fast thermal analysis on GPU for 3D-ICs with integrated microchannel cooling,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 551-555, November 2010 (acceptance rate 30%).
[C77] [TECHCON0’10] *Zhiyu Zeng, Zhuo Feng and Peng Li, “Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation,” SRC TECHCON, 4 pages, September 2010. [C76] [TECHCON0’10] *Leyi Yin and Peng Li, “In-situ jitter test and diagnosis of digital PLLs using digital reconfiguration,” SRC TECHCON, 4 pages, September 2010.
[C75] [ICCCAS’10] Yenpo Ho, Garng M. Huang and Peng Li, “Memristor system properties and its design applications to circuits such as nonvolatile memristor memories,” in Proc. of IEEE Int. Conf. on Communications, Circuits and Systems, pp. 805-819, July 2010 (invited).
[C74] [DAC’10] *Leyi Yin and Peng Li, “Exploiting reconfigurability for low-cost in-situ test and monitoring of digital PLLs,” in Proc. of ACM/IEEE Design Automation Conf., pp. 929-934, June 2010 (acceptance rate 24.4%).
[C73] [DAC’10] *Zhiyu. Zeng, *Xiaoji Ye, Zhuo Feng and Peng Li, “Tradeoff analysis and optimization of power delivery networks with on-chip voltage regulation,” in Proc. of ACM/IEEE Design Automation Conf., pp. 831-836, June 2010 (acceptance rate 24.4%).
[C72] [DAC’10] *Xiaoji Ye and Peng Li, “Parallel program performance modeling for runtime optimization of multi-algorithm circuit simulation,” in Proc. of ACM/IEEE Design Automation Conf., pp. 561-566, June 2010 (acceptance rate 24.4%).
[C71] [DAC’10] *Yong Zhang, Peng Li and Garng M. Huang, “Separatrices in high-dimensional state space: system-theoretical tangent computation and application to SRAM dynamic stability analysis,” pp. 567-572, in Proc. of ACM/IEEE Design Automation Conf., June 2010 (acceptance rate 24.4%).
[C70] [TAU’10] *Xiaoji Ye and Peng Li, “Performance modeling of a hierarchical multi-algorithm parallel circuit simulator,” in Proc. of ACM Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, March 2010 (acceptance rate 50%).
[C69] [ISPD’10] Venkata Rajesh Mekala, Yifang Liu, *Xiaoji Ye, Jiang Hu and Peng Li, “Accurate clock mesh sizing via sequential quadratic programming,” in Proc. of ACM Int. Symp. on Physical Design, pp. 135-142, March 2010.
[C68] [ICCAD’09] *Yong Zhang and Peng Li, “Gene-regulatory memories: electrical-equivalent modeling, simulation and parameter identification,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 491-496, November 2009 (acceptance rate 26.3%).
[C67] [ICCAD’09] *Wei Dong and Peng Li, “Final-value ODEs: stable numerical integration and its application to parallel circuit analysis,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 403-409, November 2009 (acceptance rate 26.3%).
[C66] [ICCAD’09] *Xiaoji Ye, *Srinath S. Narasimhan and Peng Li, “Leveraging efficient parallel pattern search for clock mesh optimization,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 529-534, November 2009 (acceptance rate 26.3%).
[C65] [ICCAD’09] Yenpo Ho, Garng M. Huang and Peng Li, “Nonvolatile memristor memory: device characteristics and design implications,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 485-490, November 2009 (acceptance rate 26.3%). [C64] [TECHCON’09] *Xioaji Ye, Wei Dong and Peng Li, “A hierarchical multi-Algorithm parallel circuit simulation framework,” SRC TECHCON, 4 pages, September 2009 (Best in Session Award).
[C63] [TECHCON’09] *Guo Yu and Peng Li, “Hierarchical synthesis of large mixed-signal circuits with consideration of process variations,” SRC TECHCON, 4 pages, November 2009.
[C62] [DAC’09] *Wei Dong and Peng Li, “Parallelizable stable explicit numerical integration for efficient circuit simulation,” in Proc. of IEEE/ACM Design Automation Conf., pp. 382-385, July 2009 (acceptance rate 21.7%).
[C61] [ISQED’09] *Zhiyu Zeng, Peng Li and *Zhuo Feng, “Parallel partitioning based on-chip power distribution network analysis using locality acceleration,” in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 776-781, March 2009 (acceptance rate 29.0%).
[C60] [ISQED’09] *Xiaoji Ye and Peng Li, “An application-specific adjoint sensitivity analysis framework for clock mesh sensitivity computation,” in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 634-640, March 2009 (acceptance rate 29.0%).
[C59] [FPGA’09] Kanupriya Gulati, Sunil P. Khatri and Peng Li, “Closed-loop modeling of power and temperature profiles of FPGAs,” ACM/SIGDA Int. Symp. on Field-Programmable Gate Arrays, 9 pages, February 2009.
[C58] [ICCAD’08 ] *Zhuo Feng and Peng Li, "Multigrid on GPU: tackling power grid analysis on parallel SIMT platforms,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 647-654, November 2008, (acceptance rate 26.6%), (Best paper award nomination, 14 out of 458 submissions, 3%).
[C57] [ICCAD’08] *Wei Dong, Peng Li and Garng M. Huang, “SRAM dynamic stability: theory, variability and analysis,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 378-385, November 2008 (acceptance rate 26.6%) (Best paper award nomination, 14 out of 458 submissions, 3%).
[C56] [ICCAD’08] *Guo Yu and Peng Li, “Yield-aware hierarchical optimization of large analog integrated circuits,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 79-84, November 2008 (acceptance rate 26.6%).
[C55] [ICCAD’08] *Xiaoji Ye, *Wei Dong, Peng Li and Sani R. Nassif, “MAPS: multi-algorithm parallel circuit simulation,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 73-78, November 2008 (acceptance rate 26.6%).
[C54] [TECHCON’08] *Zhuo Feng, Peng Li and Zhuoxiang Ren, “Design-dependent statistical interconnect corner extraction under inter/intra-die variations,” SRC TECHCON, 4 pages, November 2008.
[C53] [DAC’08] *Wei Dong, Peng Li and *Xiaoji Ye, “WavePipe: parallel transient simulation of analog and digital circuits on multi-core shared-memory machines,” in Proc. of IEEE/ACM Design Automation Conf., pp. 238-243, June 2008 (acceptance rate 23.0%), ( Best paper award, two out of 639 submissions, 0.3%).
[C52] [ISCAS’08] Rajesh Garg, Peng Li and Sunil P. Khatri “Modeling dynamic stability of SRAMs in the presence of single event upsets (SEUs)”, in Proc. of IEEE Int. Symp. on Circuits and Systems, pp. 1788-1791, May 2008.
[C51] [ISPD’08] Rupak Samanta, Jiang Hu and Peng Li, “Discrete buffer and wire sizing for link-based non-tree clock networks,” ACM Int. Symp. on Physical Design, pp. 175-181, April 2008.
[C50] [ICCDCS’08] Ivick Guerra-Gomez, Esteban Tlelo-Cuautle, Peng Li, and Georges Gielen, “Simulation-based optimization of UGCs performances”, in Proc. of the 7th IEEE International Caribbean Conference on Devices, Circuits and Systems, pp. 1-4, April 2008.
[C49] [ISQED’08] *Xiaoji Ye, Min Zhao, Rajendran Panda, Peng Li and Jiang Hu, “Accelerating clock mesh simulation using matrix-level macromodels and dynamic time step rounding,” in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 627-632, March 2008 (acceptance rate 30%).
[C48] [TAU’08] *Xiaoji Ye, *Wei Dong and Peng Li, “A multi-algorithm approach to parallel circuit simulation,” in Proc. of ACM/IEEE Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, February 2008.
[C47] [ICCAD’07] *Zhuo Feng and Peng Li, “A methodology for timing model characterization for statistical static timing analysis,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 725-729, November 2007 (acceptance rate 27.3%).
[C46] [ICCAD’07] *Xiaoji Ye, Peng Li, Min Zhao, Rajendran Panda and Jiang Hu, “Analysis of large clock meshes via harmonic-weighted model order reduction and port sliding,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 627-631, November 2007 (acceptance rate 27.3%).
[C45] [ICCAD’07] *Wei Dong, *Zhuo Feng and Peng Li, “Efficient VCO phase macromodel generation considering statistical parametric variations,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 874-878, November 2007 (acceptance rate 27.3%).
[C44] [ICCAD’07] Yang Yi, Peng Li, Vivek Sarin and Weiping Shi, “Impedance extraction for 3-D structures with multiple dielectrics using preconditioned boundary element method”, in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 7-10, November 2007 (acceptance rate 27.3%).
[C43] [ICCAD’07]*Guo Yu and Peng Li, “Yield-aware analog integrated circuit optimization using Geostatistics motivated performance modeling,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 464-469, November 2007, (acceptance rate 27.3%).
[C42] [ITC’07] *Guo Yu and Peng Li, “A methodology for systematic built-in self-test of phase-locked loops targeting at parametric failures,” pp. 1-10, in Proc. of IEEE Int. Test Conference, October 2007.
[C41] [BMAS’07] Garng M. Huang, *Wei Dong, Yenpo Ho, and Peng Li, “Tracing SRAM separatrix for dynamic noise margin analysis under device mismatch,” in Proc. of IEEE Int. Behavioral Modeling and Simulation Conf., pp. 6-10, September 2007.
[C40] [CICC’07] *Wei Dong, Peng Li and *Xiaoji Ye, “Efficient frequency-domain simulation of massive clock meshes using parallel harmonic balance,” in Proc. of IEEE Custom Integrated Circuits Conference, pp. 631-634, September 2007 (acceptance rate 48.2%).
[C39] [DAC’07] *Xiaoji Ye, Yaping Zhan and Peng Li, “Statistical leakage power minimization using fast equi-slack shell based optimization,” in Proc. of IEEE/ACM Design Automation Conference, pp. 853-858, June 2007 (acceptance rate 23.2%).
[C38] [DAC’07] *Guo Yu, *Wei Dong, *Zhuo Feng and Peng Li, “A framework for accounting for process model uncertainty in statistical static timing analysis,” in Proc. of IEEE/ACM Design Automation Conference, pp. 829-834, June 2007 (acceptance rate 23.2%).
[C37] [DAC’07] *Wei Dong and Peng Li, “Accelerating harmonic balance simulation using efficient parallelizable hierarchical preconditioning,” in Proc. of IEEE/ACM Design Automation Conference, pp. 436-439, June 2007 (acceptance rate 23.2%).
[C36] [DAC07] *Zhuo Feng, Peng Li and Yaping Zhan, “Fast second-order statistical static timing analysis using parameter dimension reduction,” in Proc. of IEEE/ACM Design Automation Conference, pp. 244-249, June 2007 (acceptance rate 23.2%).
[C35] [ISQED’07] *Guo Yu, Peng Li and *Wei Dong, “Achieving low-cost linearity test and diagnosis of Sigma-Delta ADCs via frequency-domain nonlinear analysis and macromodeling”, in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 513-518, March 2007 (acceptance rate 33%).
[C34] [ISQED’07] *Zhuo Feng, *Guo Yu and Peng Li, “Reducing the complexity of VLSI performance variation modeling via parameter dimension reduction”, in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 737-742, March 2007 (acceptance rate 33%).
[C33] [TAU’07] *Xiaoji Ye, Yaping Zhan and Peng Li, “Statistical leakage power minimization using fast equi-slack shell based optimization,” in Proc. of ACM/IEEE Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, pp. 37-42, February 2007 (acceptance rate 44.0%).
[C32] [TAU’07] *Zhuo Feng and Peng Li, “Parameterized waveform-independent gate models for timing and noise analysis”, in Proc. of ACM/IEEE Int. Workshop on Timing Issues in the Specification and Synthesis of Digital Systems, pp. 61-65, February 2007 (acceptance rate 44.0%).
[C31] [ICCAD’06] *Zhuo Feng and Peng Li, “Performance-oriented statistical parameter reduction of parameterized systems via reduced rank regression,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 868-875, November 2006 (acceptance rate 23.4%) (Best paper award nomination, 16 out of 541 submissions, 3%).
[C30] [ICCAD’06] *Xiaoji Ye, Peng Li and Frank Liu, “Practical variation-aware interconnect delay and slew analysis for statistical timing verification”, in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 54-59, November 2006 (acceptance rate 23.4%).
[C29] [ICCAD’06] Ganesh Venkataraman, *Zhuo Feng, Jiang Hu, Peng Li, “Combinatorial algorithms for fast clock mesh optimization,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 563-567, November 2006 (acceptance rate 25.1%).
[C28] [EPEP’06] Yang Yi, Peng Li, Vivek Sarin, and Weiping Shi, “A preconditioned hierarchical algorithm for impedance extraction of interconnects in packages,” 15th IEEE Topical Meeting on Electrical Performance of Electronic Packaging (EPEP), pp. 99-102, October, 2006.
[C27] [DAC’06] *Guo Yu and Peng Li, “Lookup table based simulation and statistical modeling of Sigma-Delta ADCs”, in Proc. of IEEE/ACM Design Automation Conference, pp.1035-1040, July 2006 (acceptance rate 20.8%).
[C26] [DAC’06] Peng Li and Weiping Shi, “Model order reduction of linear networks with massive ports via frequency-dependent port packing,” in Proc. of IEEE/ACM Design Automation Conference, pp. 267-272, July 2006 (acceptance rate 20.8%).
[C25] [DAC’06] Shiyan Hu, Qiuyang Li, Jiang Hu and Peng Li, “Steiner network construction for timing critical nets,” in Proc. of IEEE/ACM Design Automation Conference, pp. 379-384, July 2006 (acceptance rate 20.8%).
[C24] [ISQED’06] *Zhuo Feng, Peng Li and Jiang Hu, “Efficient model update scheme for general link-insertion networks,” in Proc. of IEEE Int. Symp. on Quality Electronic Design, pp. 43-50, March 2006 (acceptance rate 36.3%).
[C23] [ISQED’06] Peng Li, “Critical path analysis considering temperature, power supply variations and temperature induced leakage,” in Proc. of IEEE Int. Symp. on Quality Electronic Design, March 2006 (acceptance rate 36.3%).
[C22] [ICCAD’05] Peng Li, “Variational analysis of large power grids by exploring statistical sampling sharing and spatial locality,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 645-651, November 2005 (acceptance rate 23.7%).
[C21] [ICCAD’05] Xin Li, Peng Li and Lawrence Pileggi, “Parameterized interconnect order reduction with explicit-and-implicit multi-parameter moment matching for inter/intra-die variations,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 806-812, November 2005 (acceptance rate 23.7%).
[C20] [ICCAD’05] G. Venkataraman, N. Jayakumar, J. Hu, P. Li, S. Khatri, A. Rajaram, P. McGuinness and C. Alpert, “Practical techniques to reduce skew and its variations in buffered clock networks,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 592-596, November 2005 (acceptance rate 23.7%).
[C19] [ICCD’05] Peng Li and Emrah Acar, “A waveform independent gate model for accurate timing analysis,” in Proc. of IEEE Int. Conf. on Computer Design, pp. 363-365, October 2005 (acceptance rate 23.0%).
[C18] [ICCD’05] Peng Li, Yongdong Deng and Lawrence Pileggi, “Temperature-dependent optimization of cache leakage power dissipation,” in Proc. of IEEE Int. Conf. on Computer Design, pp. 7-12, October 2005 (acceptance rate 23.0%).
[C17] [CICC’05] Rohan Batra, Peng Li, Lawrence T. Pileggi and Wan-ju Chiang, "A behavioral level approach for nonlinear dynamic modeling of voltage-controlled oscillators," in Proc. of IEEE Custom Integrated Circuit Conference, pp. 717-720, September 2005 (acceptance rate 26.3%).
[C16] [DAC’05] Peng Li, "Power grid simulation via efficient sampling-based sensitivity analysis and hierarchical symbolic relaxation," in Proc. of IEEE/ACM Design Automation Conference), pp. 664-669, June 2005 (acceptance rate 21.0%).
[C15] [DATE’05] Peng Li, Frank Liu, Xin Li, Lawrence Pileggi and Sani Nassif, "Modeling interconnect variability using efficient parametric model order reduction," in Proc. of Design Automation and Test In Europe Conference (DATE), pp. 958-963, March 2005, (acceptance rate 21.3%).
[C14] [DATE’05] Sounil Biswas, Peng Li, Ronald D. Blanton and Lawrence T. Pileggi, "Specification test compaction for analog circuits and MEMS,” in Proc. of Design Automation and Test In Europe Conference (DATE), pp. 164-169 March 2005 (acceptance rate 21.3%).
[C13] [ICCAD’04] Peng Li, Lawrence Pileggi, Mehdi Asheghi and Rajit Chandra, “Efficient full-chip thermal modeling and analysis,” in Proc. of IEEE/ACM Int. Conf. on Computer-Aided Design (ICCAD), pp. 319-326, November 2004 (acceptance rate 24.4%).
[C12] [ICCAD’04] Peng Li and Lawrence Pileggi, “Efficient harmonic balance simulation using multi-level frequency decomposition,” in Proc. IEEE/ACM Int. Conf. on Computer-Aided Design (ICCAD), pp. 677-682, November 2004 (acceptance rate 24.4%).
[C11] [BMAS’04] Rohan Batra, Peng Li, Lawrence Pileggi and Yu-Tsun Chien, "A methodology for analog circuit macromodeling," in Proc. of IEEE International Behavioral Modeling and Simulation Conference, pp. 41- 46, October 2004.
[C10] [DAC’04] Xin Li, Yang Xu, Peng Li, Padmini Gopalakrishnan and Lawrence Pileggi, “A frequency relaxation approach for analog/RF system-Level simulation,” in IEEE/ACM Design Automation Conf. , pp. 842-847, June 2004, (acceptance rate 20.8%).
[C9] [BMAS’03] Peng Li and Lawrence Pileggi, “Modeling nonlinear communication ICs using a multivariate formulation,” in Proc. of IEEE International Workshop on Behavioral Modeling and Simulation, pp. 24-27, October 2003.
[C8] [ICCAD’03] Peng Li, Xin Li, Yang Xu and Lawrence Pileggi, “A hybrid approach to nonlinear macromodel generation for time-varying analog circuits,” in Proc. IEEE/ACM Int. Conf. on Computer-Aided Design, pp. 454-461, November 2003 (acceptance rate 26.3%).
[C7] [DAC’03] Peng Li and Lawrence Pileggi, “NORM: compact model order reduction of weakly nonlinear systems,” in Proc. of 40th IEEE/ACM Design Automation Conference, pp. 472-477, June 2003, (acceptance rate 24.2%) (Best Paper Award, four out of 628 submissions, 0.6%).
[C6] [DAC’03] Xin Li, Peng Li, Yang Xu and Lawrence Pileggi, “Analog and RF circuit macromodels for system-level analysis,” in Proc. of 40th IEEE/ACM Design Automation Conference (DAC), pp. 478-483, June 2003, (acceptance rate 24.2%).
[C5] [DATE’03] Yang Xu, Xin Li, Peng Li and Lawrence Pileggi, “Noise macromodel for radio frequency integrated circuits,” in Proc. of IEEE/ACM Design Automation & Test In Europe Conference (DATE), pp. 150-155, March 2003 (acceptance rate 25.8%).
[C4] [ASP-DAC’03] Peng Li and Lawrence Pileggi, “Nonlinear distortion analysis via linear-centric models,” in Proc. of IEEE/ACM Asia and South Pacific Design Automation Conf., pp. 897-903, January 2003, (acceptance rate 33.6%).
[C3] [ASP-DAC’03] Xin Li, Peng Li, Yang Xu, Robert Dimaggio and Lawrence Pileggi, “A frequency separation macromodel for system-level simulation of RF circuits,” in Proc. of IEEE/ACM Asia and South Pacific Design Automation Conf., pp. 891-896, January, 2003 (acceptance rate 33.6%).
[C2] [DATE’02] Peng Li and Lawrence Pileggi, “A linear-centric approach to harmonic balance analysis,” in Proc. of IEEE/ACM Design Automation & Test In Europe Conf., pp. 634-639, March 2002 (acceptance rate 29.8%).
[C1] [SLIP’00] Peng Li, Pranab K. Nag and Wojciech Maly, “Cost based tradeoff analysis of standard cell designs,” in Proc. of ACM International Workshop on System-Level Interconnect Prediction, pp. 129-135, April 2000.
Book Chapters [go back to top]
[B7] *Honghuang Lin, Asad Khan, and Peng Li, “Sparse Relevance Kernel Machine-Based Performance Dependency Analysis of Analog and Mixed-Signal Circuits,” in Machine Learning in VLSI Computer-Aided Design, pp. 423-447, Springer 2019.
[B6] Peng Li, *Wei Dong and Garng M. Huang, “Dynamic stability of static memories: concepts and advanced numerical analysis techniques,” pp. 95-113, in Simulation and Verification of Electronic and Biological Systems, Peng Li, L. Miguel Silveira and Peter Feldmann (Eds.), Springer, 2011.
[B5] Peng Li and Wei Dong, “Parallel preconditioned hierarchical harmonic balance for analog and RF circuit simulation,” 20 pages, pp. 111-130, in Advances in Analog Circuits, IN-TECH Press (http://www.intechweb.org), ISBN 978-953-307-323-1, February 2011.
[B4] Esteban Tlelo-Cuautle, Elyoenai Martínez-Romero, Carlos Sánchez-López, Francisco V. Fernández, Sheldon X.-D. Tan, Peng Li and Mourad Fakhfakh, “Behavioral modeling of mixed-mode integrated circuits,” pp.85-108, in Advances in Analog Circuits (book title), IN-TECH Press (http://www.intechweb.org), ISBN 978-953-307-323-1, February 2011.
[B3] Rasit Onur Topaloglu, *Zhuo Feng and Peng Li, “Interconnect variability and performance analysis,” pp. 21-39, in Recent Topics on Modeling of Semiconductor Processes, Devices and Circuits (editor: Rasit Onur Topaloglu, co-editor: Peng Li), Bentham Publishing (www.ebook-engineering.org), 2011.
[B2] Rasit Onur Topaloglu, *Guo Yu and Peng Li, “Probability propagation and yield optimization for analog circuits,” pp. 61-80, in Recent Topics on Modeling of Semiconductor Processes, Devices and Circuits (editor: Rasit Onur Topaloglu, co-editor: Peng Li), Bentham Publishing (www.ebook-engineering.org), 2011.
[B1] *Guo Yu and Peng Li, “Robust design and test of analog/mixed-signal circuits in deeply scaled CMOS technologies", pp. 353-374, inVLSI (book title), IN-TECH Press (http://www.intechweb.org/), ISBN 978-953-307-049-0, February 2010.
Patents
[P1] P. Li, L. Pileggi, M. Asheghi and R. Chandra, Methods and Apparatus for thermal modeling and analysis of semiconductor chip designs, US patent No. 7,401,304 B2, issued in July 2008.
[P2] X. Li, Y. Yu, P. Li and L. Pileggi, Analog and Radio Frequency (RF) System-level Simulation Using Frequency Relaxation, US patent No. 7,653,524 B2, issued in January 2010.
[P3] X. Li, P. Li and L. Pileggi, Method for Parameterized Model Order Reduction of Integrated Circuit Interconnects, US patent No. 7,908,131 B1, issued in March 2011.
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