Difference between revisions of "DesignRules"
From OptoelectronicsWiki
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− | Design Rules | + | '''Design Rules''' |
WG | WG | ||
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− | Processing Rules | + | '''Processing Rules''' |
Always put a dummy/witness sample in the chamber when depositing metals and dielectrics. | Always put a dummy/witness sample in the chamber when depositing metals and dielectrics. | ||
*Samples can later be used for determining thicknesses. | *Samples can later be used for determining thicknesses. | ||
*These samples can also be used if a given layer has to be etched on the real sample, but etch is not well characterized. | *These samples can also be used if a given layer has to be etched on the real sample, but etch is not well characterized. |
Revision as of 09:42, 13 April 2010
Design Rules
WG
- 3 um trenches for 200 um S-bends keep bending losses minimal
- Put 50 um trench around Verniers and alignment markers
VC
- 10 um x 10 um, 50 um separation
- No VC around verniers, so verviers have a chance of being exposed after substrate removal
Mesa
- 14 um wide
QW
- 16 um wide
Thick p metal
- Same at N metal
- 4 um wide
- Keep 11 um separation between thick P and N metal.
N Metal
- 20 um wide
Implant
- 12 um wide
Via
- Min. 6 um opening
- Open up area that is uniform at bottom
Processing Rules
Always put a dummy/witness sample in the chamber when depositing metals and dielectrics.
- Samples can later be used for determining thicknesses.
- These samples can also be used if a given layer has to be etched on the real sample, but etch is not well characterized.