Difference between revisions of "Process Hybrid Silicon"
From OptoelectronicsWiki
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|HSP-QW || || || [[media:QW_etch.xlsx | III-V QW etch]] || | |HSP-QW || || || [[media:QW_etch.xlsx | III-V QW etch]] || | ||
| + | |- | ||
| + | |HSP-PP || || || [[media:Probe_pad.xlsx | Probe pad deposition]] | ||
| + | ||Pattern and deposit probe metal | ||
| + | |- | ||
| + | |HSP-PTLM || || || [[media:P_TLM.xlsx | p-TLM step]] || An additional process step is necessary to pattern p-TLM structures | ||
| + | |- | ||
| + | |HSP-METAL || || || [[media:P_N_metal.xlsx | thin metal]] || Thin metal deposition | ||
| + | |- | ||
| + | |HSP-NETCH || || || [[media:N_Layer_etch.xlsx | n-layer etch]] || Remove n-layer to expose Si | ||
| + | |- | ||
| + | |HSP-METCH || || || [[media:Mesa_etch.xlsx | Mesa etch]] || Forms mesa | ||
|- | |- | ||
| HSP-SOA || || || || Hybrid silicon with SOAs | | HSP-SOA || || || || Hybrid silicon with SOAs | ||
Revision as of 20:05, 22 September 2010
| Process ID | Version | Process flow | Process follower | Description |
|---|---|---|---|---|
| SP-PWD | Si WG etch | Si WG etch | Single etch-step SOI process; passive components | |
| SP-VC | Si VC etch | Vertical channel etch | ||
| HSP-QW | III-V QW etch | |||
| HSP-PP | Probe pad deposition | Pattern and deposit probe metal | ||
| HSP-PTLM | p-TLM step | An additional process step is necessary to pattern p-TLM structures | ||
| HSP-METAL | thin metal | Thin metal deposition | ||
| HSP-NETCH | n-layer etch | Remove n-layer to expose Si | ||
| HSP-METCH | Mesa etch | Forms mesa | ||
| HSP-SOA | Hybrid silicon with SOAs | |||
| HSP-MOD | Hybrid silicon with modulators | |||
| HSP-DET | Hybrid silicon with detectors | |||
| HSP-SOA-DET | Hybrid silicon with SOAs and detectors | |||
| HSP-SOA-DET-MOD | Hybrid silicon with SOAs, detectors and modulators |
