Collective Wisdom
From OptoelectronicsWiki
Rationale & Rules
This page lists a set of reviewed reports that can be used for background knowledge on modeling, fabrication and test & measurement. The aim of this page is to list reviewed, complete and well-written reports, with links and references to all the required background knowledge. To this end we have standardized the approach how we should write these documents:
- The template has a standardized cover page. Use this and fill it in completely. The template can be downloaded here.
- Write your report in the same style how you would write a journal or conference paper: introduction, theory, experimental setup, results, discussion, conclusion. Now you have version 0.
- Find at least two people who want to review your report. Ask them to be critical. Discuss with them and implement any changes. Now you have version 1.
- Version 1 can be uploaded to the list below. Version 0 not.
- The cover page allows you to track your changes over time. Increase the version number every time you want to make changes and re-upload.
List of reports
This is the core process which should be considered the "template"; additional modules can be added to this as desired.
Process ID | Process follower | Description |
---|---|---|
Chip and Wafer Sizing | Sizing Notes | Size and shape rational and requirements. |
WG etch | Si WG etch | Rib waveguide formation, Alignment marks. |
VC etch | Si VC etch | Vertical channel etch |
Bonding | Short guide | Plasma assisted wafer bonding full guide - Author:Michael D |
InP-mesa etch | P-mesa etch | Mesa etch to top SCH layer |
QW wet etch | QW etch | Active layer wet etch |
N-metal deposition | N-metal deposition | N-metal (Ni/Ge/Au/Ni/Au) |
Buffer & Via formation | Planarization & Via etch | 1um oxide deposition & via etch |
P-/Probepad metal deposition | Probepad metallization | P-/probepad metal stack (Pd/Ti/Pd/Au) |