ECE137B
Spring 2019
DO NOT GO TO THE SCHEDULED LAB HOURS during the first week of classes. The laboratory/design content of the class is run on an independent basis. Design projects are assigned and a due date is given. Students work in the lab constructing and testing their designs, working in the lab at whatever time they find most suitable to work.
Hit the refresh button to make sure you see recent updates to HW, labs, etc
Recent updates
will be posted here
1) The final exam review will be held Friday May 31 (not Friday June
7), 5-630PM in Phelps
1437. I will be available 630-7 for questions
2) Problem set 7
need not be turned it. But, it is a
study problem set for the final exam. Please be sure to work the problems.
Picking
Up Your Graded Assignments
*********************************************************
Prof. Mark Rodwell
Office Hrs: Tuesdays 4-5PM, Thursdays 4-5 PM, ESB Room 2205F.
Tuesdays, Thursdays 9:30am-10:45pm Phelps 1425.
Midterm exam: Tuesday
April 30, 2019
Dead week: June 4-8
Final Exam: Tuesday June 11, 8 - 11 a.m., 2019
(From http://registrar.sa.ucsb.edu/finals-spring.aspx and http://registrar.sa.ucsb.edu/cal2018.aspx )
I will schedule reviews near the times of the 3 lab checkoffs, and the mid-term and final exams.
Date |
Time |
Location |
Subject / Objective |
Friday April 5 |
5-630 |
Phelps 1437 |
overview of lab projects 5-530, 530-6, 6-630 for
labs 1,2,3 |
Friday April 19 |
5-630 PM |
Phelps 1437 |
lab discussion: checkoff 2 5-530, 530-6, 6-630 for
labs 1,2,3. |
|
5-630 PM |
Phelps 1437 |
lab discussion: checkoff 3 5-530, 530-6, 6-630 for
labs 1,2,3 |
Friday May 31 |
5-630PM |
Phelps 1437 |
final exam review |
TA |
Email |
office hours |
Location |
Akso, Emre |
emreakso@umail.ucsb.edu |
4-5 M |
The lab
|
Mc Carthy, David |
davidmccarthy@umail.ucsb.edu |
2-3 Tues |
the lab |
Sheth, Cameron |
csheth@umail.ucsb.edu |
4-5 W |
The lab
|
Please
note that these office hours will be replaced (will not be held ) during
weeks when the TAs are holding office hours in the lab. See below |
Comments about class preparation.
The laboratory/design content of the class is run on an independent basis. Design projects are assigned and a due date is given. Students work in the lab, working in groups of two (not three) constructing and testing their designs, working in the lab at whatever time they find most suitable to work.
During the week of that each lab project is due, the above TA hours will *not* be held.
Instead, the TAs will be in the lab to provide you with guidance in the lab, at hours posted both here and on the lab door.
Please note:
TA Emre: fiber optic
project
TA Cameron. Pulse width modulation project
TA David McCarthy: acoustic phased array project
Dates and times when TA
hours will be held in the lab. Checkoff times=* |
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Monday |
Tuesday |
Wednesday |
Thursday |
Friday |
** |
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April 8 6-8PM: EA |
April 9 5-7PM: DM |
April 10 5-6PM: CS |
April 11 4-6: EA 6-8: DM |
April 12 4-5 CS 5-6 EA 6-7 DM |
April 15 *4-11PM: EA *4-11PM CS |
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April 30 |
April 30: |
May 1 4-6PM: CS |
May 2 5-7PM:CS |
May 3 3-5PM: CS |
May 6 |
May 7 5-6PM:EA |
May 8 6-8PM: CS 5-6PM:DM |
May 9 4-6PM:EA 330-530PM: DM |
May 10 4-6PM: DM |
May 13 *4-11PM:CS *4-11PM EA |
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May 20 |
May 21 |
May 22 : |
May 23 |
May 24: 4-5PM: CS 5-6PM: DM |
May 27
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May 28 4-5PM: CS 5-6PM: EA 3-4PM: DM |
May 29 5-6PM: EA |
May 30 4-6PM: EA 4-6PM: DM |
May 31 4-5pm, 630-830PM:DM |
June 3 *4-11PM: *4-11PM: |
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Checkoffs will be in the lab, and will be by appointment. A signup sheet for lab checkoffs will be distributed in lecture. Please see the TAs if you must change your appointment time. During the checkoff periods, the TAs are not available to provide you with guidance, and the lab is will be closed except to those checking off. This means that you should plan to have your lab fully tested and working the day before.
Problem sets are due 5PM in
the class homework box in Harold Frank Hall |
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# |
week |
what |
due |
files |
1 |
2 |
nodal analysis, frequency & transient
response, poles/zeros. |
Fri. |
assignment: |
updates: |
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2 |
3 |
nodal analysis, frequency
& transient response, poles/zeros. |
Mon 4/22/19 |
assignment: |
updates: |
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3 |
4 |
frequency/transient
response of CS/CE, and CB/CG stages |
Fri. |
assignment: |
updates: |
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4 |
6 |
frequency/transient
response of CC and CD stages |
Fri. |
assignment: |
updates: |
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5 |
7 |
Frequency response of multistage amplifiers & op-amps |
Fri. |
assignment: |
updates: |
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6 |
8 |
Basics of negative feeback
and stability. |
Tues 5/28/19 |
assignment: |
updates: |
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7 |
9 |
Putting it all together:
finding op-amp poles and computing op-amp phase margin |
Tues
not due |
assignment: |
updates: |
Missing parameters in assignments: Often a problem statement will omit to give certain parameter values. In those cases, use default values, as below. In some problems, you are asked to use data sheet values for device parameters. In those cases, be certain that the data is not on the data sheet before using these default values.
channel output conductance
parameter, lambda (MOSFETS) |
0 in DC calculations 1/(10 V) in AC calculations |
MOS channel mobility |
400 cm^2/(volt-second)
NMOS, 200 for PMOS |
MOS saturation drift
velocity |
10^7 cm/s NMOS, 5*10^6 cm/s
PMOS |
MOS gate length |
90 nm |
gate oxide thickness |
1 nm |
MOSFET threshold voltage |
+0.3 V (NMOS), -0.3V (PMOS) |
Va,
Early voltage (BJTs) |
100 V. |
beta (current gain of BJTs) |
100 |
Vce(sat) (BJTs) |
0.5 V |
Vbe(on) (BJTs) |
0.7 V |
Ise of BJTs in current mirrors |
matched if not specified
otherwise |
vsatCoxWg (or mCoxWg /Lg)and
Vth of MOSFETs in
current mirrors |
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Graded HW and Lab projects are obtained from the TAs. Please see them during either office hours or during their lab hours.
Solutions will be posted on Gauchospace.
You have the choice of doing one of three possible lab
projects.
Each project is a major project, and will take the whole quarter. To keep you
on schedule, there will be three checkoff phases.
Project # |
Name |
files |
Digital audio power
amplifier |
Matlab files: longer_pwm_plus_feedback.m slow
running more accurate pulse width simulation raised_cos_baseband_filter2.m.
sub-file needed for all simulations hann.m
sub-file needed for all simulations summary_PWM.pdf set of images from the PWM
simulations |
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fast fiber optic link |
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acoustic phased array |
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General lab hints: lab_hints.pdf |
what |
when |
first checkoff phase 10% of points |
design review: none checkoff: 4/15/2019 report: 4/17/2019 |
updates: |
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second checkoff phase 35% of points |
design review
document: 4/26/2019 checkoff: 5/6/2019 report: 5/9/2019 |
updates: |
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third checkoff phase |
design review
document: 5/24/2019 checkoff: 6/3/2019 report: 6/7/2019 |
updates: |
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Check-offs are by
appointment with the TAs |
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Design review contains: (1)
statement of design goals, (2) circuit diagram, (3) calculations proving that
the circuit will meet specifications. |
The main text for the class is the online lecture notes- these are available via the links below.
You will also need to have a quality analog IC design text. If you don't have one, the recommended text for this class is Fundamentals of Microelectronics, by Behzad Razavi.
Other high-quality alternatives are Microelectronic Circuit Design by R.C. Jaeger and T.N.
Blalock, or Analysis and Design of Analog Integrated Circuits, by Grey, Meyer, and Lewis. The
Grey/Meyer/Lewis and Razavi texts, are focused and have little added secondary material.
These book can be purchased online from many vendors. Older editions have the
advantage that used copies can be obtained at a lower price. Any of these books
would be just fine.
Every textbook covers the material differently, as do the lecture notes. It helps to have several perspectives.
Please read each note set
before attending lectures. It will then be much easier to follow the lectures
! |
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week |
set |
subject |
comment |
1 |
Transistor high-frequency models |
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1 |
Common source/emitter frequency response |
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2 |
Emitter degeneration: approximate |
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2 |
Ampl. LF/HF pulse response, dominant poles |
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3 |
common gate/base frequency response |
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3 |
method of time constants |
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4 |
Digital circuits: delays
and risetimes |
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4 |
MOTC, source and emitter followers |
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4 |
Multistage frequency response analysis |
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5 |
Multistage frequency response analysis |
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6 |
Multistage frequency response analysis |
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6 |
Negative feedback |
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7 |
Feedback & transfer functions |
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8 |
Bode Feedback stability criterion |
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9 |
Feedback loop compensation |
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10 |
Port impedance and feedback |
very detailed.. |
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10 |
Feedback example |
subtle |
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10 |
Nyquist stability
criterion. |
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week |
Grey… 4th or 5th edition |
Razavi |
lecture notes |
1 |
1.4, 1.6, 7.1 |
ch. 11.1-11.4 |
1,2 |
2 |
7.2.1 |
-- |
3,4 |
3 |
7.2.3, 7.3.4 |
11.5-11.6 |
5 |
4 |
7.3.1-7.3.2 |
11.7 |
6,7 |
5 |
7.4 |
8, 9 |
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6 |
7.5 |
10 |
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7 |
8.1-8.4 |
12.1,12.2 |
11,12 |
8 |
9.1-9.5 |
12.3-6 |
13, 14 |
9 |
8.5, 8.8 |
12.7, 12.8 |
15, 16 |
10 |
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review, lab project |
Read the text to get a
different perspective on the material from the lecture notes. |
material |
comment |
you can bring this to the
exams. |
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dated, but seminal |
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hints for testing op-amps
for design projects |
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for making Bode plots |
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Good general reference on
op-amps |
year |
exam |
solution |
2002 |
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2006 |
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2006 |
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2007 |
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2007 |
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2001 |
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2003 |
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2003 |
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2004 |
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2004 |
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2006 |
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2006 |
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2007 |
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2007 |
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2014 |
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2014 |
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2014 |
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2014 |
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2015 |
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2015 |
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2015 |
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2015 |
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2016 |
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2016 |
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2016 |
Type |
link |
comment |
MOSFETs |
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small-signal matched pairs |
good for general analog
design at moderate frequencies. |
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small-signal arrays |
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small-signal array |
low (near zero) threshold
voltage. |
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medium-power |
high current devices, good also
as small-signal FETs at 1-100mA bias. At lower currents, the data sheet does
not provide data, and a curve-tracer must be used |
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high-power |
Serve well as a
complementary power output stage DC-100kHz. |
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Bipolar Transistors |
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small-signal |
the data sheets give a
spice Model with tau_f and Ccb and Cje
specified. use the formulas Ccb(Vcb)=Cjc /
(1+Vcb/Vjc)^MJC Cje(Vbe)=Cje/(1+Vbe/Vje)^MJE |
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medium-to-high-power |
The datasheets for the power
transistors are missing the ft and Ccb specifications. These are: ft = 3.0 MHz (IC = 250mA,
VCE = 10 V) for both NPN and PNP Cob = 100 pF (IE = 0, VCB =
10 V) for both NPN and PNP |
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matched pairs and arrays |
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Operational-amplifiers |
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5 V op-amps (single-dual,
quad) |
low-voltage, precision
op-amps |
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3MHz dual-supply op-amp |
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fast (15 MHz) op-amp |
inexpensive |
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even faster (80MHz) op-amp |
expensive |
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High Speed Analog Comparators |
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Precision, expensive. |
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cheaper, in stock as of 4/2019. |
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cheaper, seems to be obsolete |
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CMOS D-type flip flops |
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sufficiently fast for the
power delta-sigma adc |
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faster device for use in
the fiber optic project |
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amother fast flip-flop |
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CMOS XOR gate |
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faster device for use in
the fiber optic project |
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Fiber Optic Components |
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these couple to
"fat" optical fiber |
from Industrial fiber
optics, inc |
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10ns 650nm LED (use with
IFE98) |
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PIN Photodiode (use with
IFD91) |
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vendor
* |
3nm 870nm LED (use with
IFE98)* |
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optical fiber for the above |
the ECE shop has this. |
High performance Fiber optic components |
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these couple to 50micron
multimode fiber |
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850 nm high-speed laser
diode |
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500nm ~ 1100nm high-speed
PIN photodetector. |
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optical fiber for the above |
the ECE shop will stock
these these**. You need a multimode optical fiber with a 50 micron core, 125
micron cladding, and ST connectors on both ends |
*The ECE electronics
shop should also have these in stock: check there first.
**April 2018: please
go to here . In future, the ECE shop will stock these